| 900ccf30f9e1 ("drm/i915: Only force GGTT coherency w/a on required chipsets") |
| a8bd3b884dd7 ("drm/i915: Flush chipset caches after GGTT writes") |
| c5cb21c17a16 ("drm/i915: Store platform_mask inside the static device info") |
| a6e1c5ace481 ("drm/i915: Always define GEN as part of GENx_FEATURES") |
| bc76298e68e7 ("drm/i915: Store gen_mask inside the static device info") |
| ccf74400da4d ("drm/i915/cnl: Remove alpha_support protection") |
| 5db47e37b387 ("Revert "drm/i915: mark all device info struct with __initconst"") |
| 412310019a20 ("drm/i915/icl: Add initial Icelake definitions.") |
| b978520d1e35 ("drm/i915: Move intel_device_info definitions to its own header") |
| 3846a9b1b1f1 ("drm/i915: Move opregion definitions to dedicated intel_opregion.h") |
| 09a28bd9e802 ("drm/i915: Move display related definitions to dedicated header") |
| b74eeeb6b1ab ("drm/i915: Move some utility functions to i915_util.h") |
| eb10ed9a9e1e ("drm/i915: Convert intel_device_info_dump into pretty printer") |
| a8c9b8496954 ("drm/i915: Add pretty printer for device info flags") |
| b68763741aa2 ("drm/i915: Restore GT performance in headless mode with DMC loaded") |
| 7125397b8246 ("drm/i915: Track GGTT writes on the vma") |
| fb6db0f5bf1d ("drm/i915: Remove unsafe i915.enable_rc6") |
| 3452fa3095e9 ("drm/i915/pmu: Aggregate all RC6 states into one counter") |
| 6060b6aec03c ("drm/i915/pmu: Add RC6 residency metrics") |
| 0cd4684d6ea9 ("drm/i915/pmu: Add interrupt count metric") |
| b46a33e271ed ("drm/i915/pmu: Expose a PMU interface for perf queries") |
| dd57602efbce ("drm/i915: Switch fbc over to for_each_new_intel_plane_in_state()") |
| ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/") |
| b1e01595a66d ("drm/i915: Redo plane sanitation during readout") |
| 51f5a0963984 ("drm/i915: Add .get_hw_state() method for planes") |
| 93c6e966b4cd ("drm/i915: Remove i915.semaphores modparam") |
| af9ff6c70df4 ("drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info") |
| 0da715ee6077 ("drm/i915: Disable semaphores on Sandybridge") |
| 79e6770cb1f5 ("drm/i915: Remove obsolete ringbuffer emission for gen8+") |
| fb5c551ad510 ("drm/i915: Remove i915.enable_execlists module parameter") |
| 3fef5cda9701 ("drm/i915: Automatic i915_switch_context for legacy") |
| 2113184c6f67 ("drm/i915: Pull the unconditional GPU cache invalidation into request construction") |
| f577a03ba920 ("drm/i915: fix 64bit divide") |
| b03ec3d67ab8 ("drm/i915: There is only one fault register from GEN8 onwards") |
| dab91783338b ("drm/i915: expose command stream timestamp frequency to userspace") |
| 5888576b0b5f ("drm/i915: fix register naming") |
| 7c2fa7faf18f ("drm/i915: Stop caching the "golden" renderstate") |
| d2b4b97933f5 ("drm/i915: Record the default hw state after reset upon load") |
| cc6a818ad6bd ("drm/i915: Move intel_init_clock_gating() to i915_gem_init()") |
| f58d13d57179 ("drm/i915: Move GT powersaving init to i915_gem_init()") |
| 1803fcbca2e4 ("drm/i915: Define an engine class enum for the uABI") |
| f72b84c677d6 ("drm/i915: Move init_clock_gating() back to where it was") |
| 0397ac13dd47 ("drm/i915: Make GuC log part of the uC error state") |
| 7d41ef3479a6 ("drm/i915: Add Guc/HuC firmware details to error state") |
| 3c75de5b983a ("drm/i915: Include RING_MODE when dumping the engine state") |
| c41937fd994a ("drm/i915/guc: Preemption! With GuC") |
| a4598d17551a ("drm/i915: Rename helpers used for unwinding, use macro for can_preempt") |
| a0991e1d2801 ("drm/i915/guc: Split guc_wq_item_append") |
| 4a118ecbe99c ("drm/i915: Filter out spurious execlists context-switch interrupts") |
| 0ae188653b73 ("drm/i915: remove g4x lowfreq_avail and has_pipe_cxsr") |
