| bc3213c44415 ("drm/i915: Drop the eDP check from intel_dp_connector_destroy()") |
| 1853a9daa19e ("drm/i915/dp: make is_edp non-static and rename to intel_dp_is_edp") |
| 7b91bf7f9196 ("drm/i915/dp: rename intel_dp_is_edp to intel_dp_is_port_edp") |
| dc911f5bd8aa ("drm/i915/edp: Allow alternate fixed mode for eDP if available.") |
| b037d58f9762 ("drm/i915: Pass crtc_state and connector state to backlight enable/disable functions") |
| 8b45330ad301 ("drm/i915: Use per-connector scaling mode property") |
| eead06dff9c3 ("drm/i915: Use atomic scaling_mode instead of panel.fitting_mode") |
| 975ee5fca10b ("drm/i915/dp: cache common rates with sink rates") |
| a079d10812a3 ("drm/i915/dp: use the sink rates array for max sink rates") |
| 68f357cb7347 ("drm/i915/dp: generate and cache sink rate array for all DP, not just eDP 1.4") |
| 55cfc5808096 ("drm/i915/dp: cache source rates at init") |
| 8001b7541aa7 ("drm/i915/dp: rename rate_to_index() to intel_dp_rate_index() and reuse") |
| b5c72b207baa ("drm/i915/dp: return errors from rate_to_index()") |
| 3194102439f6 ("drm/i915/dp: use known correct array size in rate_to_index") |
| b0dd6887029c ("drm/i915/dsi: rename intel_dsi_exec_vbt_sequence to intel_dsi_vbt_exec_sequence") |
| 3f751d6517d2 ("drm/i915/dsi: stop using the drm_panel framework completely") |
| b9e56754ec79 ("drm/i915/dsi: call vbt_panel_get_modes directly instead of via drm_panel") |
| 7967ef6a02c7 ("drm/i915/dsi: remove support for more than one panel driver") |
| 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode") |
| 38dec5c0892a ("drm/i915/dsi: Call MIPI_SEQ_TEAR_ON and DISPLAY_ON for cmd-mode (untested)") |
| 7108b436c2b5 ("drm/i915/dsi: Execute MIPI_SEQ_TEAR_OFF from intel_dsi_post_disable") |
| f5bce6df8868 ("drm/i915/dsi: Group MIPI_SEQ_BACKLIGHT_ON/OFF with panel_[en|dis]able_backlight") |
| 3e40fa8a3168 ("drm/i915/dsi: Execute MIPI_SEQ_DEASSERT_RESET before calling device_ready()") |
| deae2006a3a8 ("drm/i915/dsi: Group DPOunit clock gate workaround with PLL enable") |
| c7dc5275bcbd ("drm/i915/dsi: Move MIPI_SEQ_POWER_ON/OFF calls together with pmic gpio calls") |
| 19c17df3cb5e ("drm/i915/dsi: Drop bogus MIPI_SEQ_ASSERT_RESET before POWER_ON") |
| 249f69623531 ("drm/i915/dsi: Document the panel enable / disable sequences from the spec") |
| 18a00095a5f3 ("drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT sequences") |
| 5a2e65e742ca ("drm/i915/dsi: Merge intel_dsi_disable/enable into their respective callers") |
| 3870b89a810b ("drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to mipi_exec_send_packet") |
| d7e8ef02a6b3 ("drm/i915/dp: Reset the link params on HPD/connected boot/resume") |
| 1881a4234ef0 ("drm/i915: Add MIPI_IO WA and program DSI regulators") |
| da15f7cb1914 ("drm/i915: Add support for DP link training compliance") |
| b976dc53ec43 ("drm/i915: Introduce IS_GEN9_BC for Skylake and Kabylake.") |
| 8da53efaa228 ("drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.") |
| e840fd310852 ("drm/i915/dsi: Move disable pll call outside of clear_device_ready()") |
| 8727dc090284 ("drm/i915: Expand is_lp backwards to gen8_lp and gen7_lp.") |
| 9f2bdb006a7e ("drm/i915: Prevent PPS stealing from a normal DP port on VLV/CHV") |
| c1617abc48a0 ("drm/i915: Move all the DP compliance data to a separate struct") |
| fdb14d335f8c ("drm/i915: Find fallback link rate/lane count") |
| f482984acb10 ("drm/i915: Compute sink's max lane count/link BW at Hotplug") |
| 213e08ad60ba ("drm/i915/bxt: add bxt dsi gpio element support") |
| 0a116ce895e7 ("drm/i915/glk: Implement Geminilake DDI init sequence") |
| 0d03926de530 ("drm/i915/glk: Add power wells for Geminilake") |
| cc3f90f0633c ("drm/i915/glk: Reuse broxton code for geminilake") |
| 3e4274f86e73 ("drm/i915/glk: Add a IS_GEN9_LP() macro") |
| 80fa66b6ad2b ("drm/i915: Create a common GEN9_LP_FEATURE.") |
| c39055b072f8 ("drm/i915: Pass dev_priv to intel_setup_outputs()") |
| 6315b5d33a8f ("drm/i915: dev_priv cleanup in intel_display.c") |
| dd11bc109dec ("drm/i915: dev_priv cleanup in intel_dp.c") |
