| c974c48deeb9 ("clk: sprd: Add check for return value of sprd_clk_regmap_init()") | |
| a6ae1a2948d4 ("clk: sprd: add clocks support for SC9860") | |
| 3e37b005580b ("clk: sprd: add adjustable pll support") | |
| 4fcba55cc621 ("clk: sprd: add composite clock support") | |
| e3f05d3b18e6 ("clk: sprd: add divider clock support") | |
| ab73cf2a5459 ("clk: sprd: add mux clock support") | |
| cdb09f67a2b5 ("clk: sprd: add gate clock support") | |
| d41f59fd92f2 ("clk: sprd: Add common infrastructure") |