| ca333add6933 ("KVM: x86/mmu: Explicitly track only a single invalid mmu generation") |
| 14a3c4f498ed ("KVM: x86/mmu: Revert "Revert "KVM: MMU: add tracepoint for kvm_mmu_invalidate_all_pages""") |
| dd6223c76205 ("KVM: x86/mmu: Revert "Revert "KVM: MMU: show mmu_valid_gen in shadow page related tracepoints""") |
| 002c5f73c508 ("KVM: x86/mmu: Reintroduce fast invalidate/zap for flushing memslot") |
| d012a06ab1d2 ("Revert "KVM: x86/mmu: Zap only the relevant pages when removing a memslot"") |
| 47c42e6b4192 ("KVM: x86: fix handling of role.cr4_pae and rename it to 'gpte_size'") |
| 552c69b1dc71 ("KVM: nVMX: Do not inherit quadrant and invalid for the root shadow EPT") |
| ea145aacf4ae ("Revert "KVM: MMU: fast invalidate all pages"") |
| 7390de1e99a7 ("Revert "KVM: x86: use the fast way to invalidate all pages"") |
| b59c4830ca18 ("Revert "KVM: MMU: show mmu_valid_gen in shadow page related tracepoints"") |
| 42560fb1f3c6 ("Revert "KVM: MMU: add tracepoint for kvm_mmu_invalidate_all_pages"") |
| 43d2b14b105f ("Revert "KVM: MMU: zap pages in batch"") |
| 210f494261e1 ("Revert "KVM: MMU: collapse TLB flushes when zap all pages"") |
| 52d5dedc79bd ("Revert "KVM: MMU: reclaim the zapped-obsolete page first"") |
| 4771450c345d ("Revert "KVM: MMU: drop kvm_mmu_zap_mmio_sptes"") |
| a592a3b8fc62 ("Revert "KVM: MMU: document fast invalidate all pages"") |
| 4e103134b862 ("KVM: x86/mmu: Zap only the relevant pages when removing a memslot") |
| 152482580a1b ("KVM: Call kvm_arch_memslots_updated() before updating memslots") |
| 254272ce6505 ("kvm: x86: Add memcg accounting to KVM allocations") |
| 7dcd57552008 ("x86/kvm/mmu: check if tdp/shadow MMU reconfiguration is needed") |
| a336282d7753 ("x86/kvm/nVMX: introduce source data cache for kvm_init_shadow_ept_mmu()") |
| 36d9594dfbf2 ("x86/kvm/mmu: make space for source data caching in struct kvm_mmu") |
| e173299101af ("x86/kvm/mmu: get rid of redundant kvm_mmu_setup()") |
| 14c07ad89f4d ("x86/kvm/mmu: introduce guest_mmu") |
| 6a82cd1c7b1e ("x86/kvm/mmu.c: add kvm_mmu parameter to kvm_mmu_free_roots()") |
| 3dc773e74523 ("x86/kvm/mmu.c: set get_pdptr hook in kvm_init_shadow_ept_mmu()") |
| 44dd3ffa7bb3 ("x86/kvm/mmu: make vcpu->mmu a pointer to the current MMU") |
| 09abb5e3e5e5 ("KVM: nVMX: call kvm_skip_emulated_instruction in nested_vmx_{fail,succeed}") |
| cb61de2f4819 ("KVM: nVMX: do not skip VMEnter instruction that succeeds") |
| 7671ce21b13b ("KVM: nVMX: move check_vmentry_postreqs() call to nested_vmx_enter_non_root_mode()") |
| 3ff519f29d98 ("KVM: x86: adjust kvm_mmu_page member to save 8 bytes") |
| bd18bffca353 ("KVM: nVMX: restore host state in nested_vmx_vmexit for VMFail") |
| 327c072187f7 ("KVM: nVMX: Flush linear and combined mappings on VPID02 related flushes") |
| 3d5bdae8b164 ("KVM: nVMX: Use correct VPID02 when emulating L1 INVVPID") |
| 83b20b28c670 ("KVM: x86: don't reset root in kvm_mmu_setup()") |
| b5861e5cf2fc ("KVM: nVMX: Fix loss of pending IRQ/NMI before entering L2") |
| 28a1f3ac1d0c ("kvm: x86: Set highest physical address bits in non-present/reserved SPTEs") |
| 450917b654c1 ("KVM/MMU: Simplify __kvm_sync_page() function") |
| b94742c958f0 ("kvm: x86: Add multi-entry LRU cache for previous CR3s") |
| faff87588d8b ("kvm: x86: Flush only affected TLB entries in kvm_mmu_invlpg*") |
| 956bf3531fba ("kvm: x86: Skip shadow page resync on CR3 switch when indicated by guest") |
| 08fb59d8a47d ("kvm: x86: Support selectively freeing either current or previous MMU root") |
| 7eb77e9f5fcf ("kvm: x86: Add a root_hpa parameter to kvm_mmu->invlpg()") |
| ade61e282444 ("kvm: x86: Skip TLB flush on fast CR3 switch when indicated by guest") |
| eb4b248e152d ("kvm: vmx: Support INVPCID in shadow paging mode") |
| c9470a2e2847 ("kvm: x86: Propagate guest PCIDs to host PCIDs") |
| afe828d1de40 ("kvm: x86: Add ability to skip TLB flush when switching CR3") |
| 50c28f21d045 ("kvm: x86: Use fast CR3 switch for nested VMX") |
| 1c53da3fa3a3 ("kvm: x86: Support resetting the MMU context without resetting roots") |
| 0aab33e4f945 ("kvm: x86: Add support for fast CR3 switch across different MMU modes") |
