| ce64645d86ac ("drm/i915: use variadic macros and arrays to choose port/pipe based registers") |
| 0a116ce895e7 ("drm/i915/glk: Implement Geminilake DDI init sequence") |
| 0d03926de530 ("drm/i915/glk: Add power wells for Geminilake") |
| ed37892e6df2 ("drm/i915: Address broxton phy registers based on phy and channel number") |
| e7583f7b1018 ("drm/i915: Add location of the Rcomp resistor to bxt_ddi_phy_info") |
| 842d416654eb ("drm/i915: Create a struct to hold information about the broxton phys") |
| b6e08203cc1f ("drm/i915: Move broxton vswing sequence to intel_dpio_phy.c") |
| f38861b814b5 ("drm/i915: Move DPIO phy documentation section to intel_dpio_phy.c") |
| 47a6bc61b866 ("drm/i915: Move broxton phy code to intel_dpio_phy.c") |
| b284eedaf74b ("drm/i915: Pass lane count to bxt_ddi_phy_calc_lane_optmin_mask()") |
| 362624c9ba3f ("drm/i915: Explicitly map broxton DPIO power wells to phys") |
| 01c3faa70bcd ("drm/i915: Rename struct i915_power_well field data to id") |
