| ff047a87cfac ("drm/i915/icl: Correctly clear lost ctx-switch interrupts across reset for Gen11") |
| 96606f3beb86 ("drm/i915/icl: Deal with GT INT DW correctly") |
| d02b98b8e282 ("drm/i915/icl: Handle RPS interrupts correctly for Gen11") |
| f744dbc2a64d ("drm/i915/icl: Use hw engine class, instance to find irq handler") |
| 46b3617dfec8 ("drm/i915: Actually flush interrupts on reset not just wedging") |
| 0f36a85c3bd5 ("drm/i915: Flush pending interrupt following a GPU reset") |
| 210060edc216 ("drm/i915: use engine->irq_keep_mask when resetting irqs") |
| 51f6b0f99cab ("drm/i915: Push irq_shift from gen8_cs_irq_handler() to caller") |
| a3e3883646c0 ("drm/i915/execlists: Split spinlock from its irq disabling side-effect") |
| aebbc2d7b388 ("drm/i915/execlists: Move irq state manipulation inside irq disabled region") |
| 963ddd63c314 ("drm/i915: Suspend submission tasklets around wedging") |
| 51951ae7ed00 ("drm/i915/icl: Interrupt handling") |
| 022d3093a910 ("drm/i915/icl: Prepare for more rings") |
| 2e4a5b25886c ("drm/i915: Prune gen8_gt_irq_handler") |
| f0fd96f546fb ("drm/i915: Track GT interrupt handling using the master iir") |
| e840130a25a7 ("drm/i915/execlists: Move the reset bits to a more natural home") |
| 55ef72f24fae ("drm/i915: Remove spurious DRM_ERROR for cancelled interrupts") |
| 274de876065a ("drm/i915/execlists: Flush GTIIR on clearing CS interrupts during reset") |
| a6358dda29a2 ("drm/i915/icl: Icelake interrupt register addresses and bits") |
| f3c9d4075771 ("drm/i915/execlists: Tidy enabling execlists") |
| 693cfbf05890 ("drm/i915/execlists: Record elsp offset during engine setup") |
| 42232213614d ("drm/i915/execlists: Clear context-switch interrupt earlier in the reset") |
| b978520d1e35 ("drm/i915: Move intel_device_info definitions to its own header") |
| 3846a9b1b1f1 ("drm/i915: Move opregion definitions to dedicated intel_opregion.h") |
| 09a28bd9e802 ("drm/i915: Move display related definitions to dedicated header") |
| b74eeeb6b1ab ("drm/i915: Move some utility functions to i915_util.h") |
| 16a8739402a0 ("drm/i915: Tidy up GEM_TRACE around execlists") |
| 16c8619a7c53 ("drm/i915: Avoid context dereference inside execlists_submission_tasklet") |
| eb10ed9a9e1e ("drm/i915: Convert intel_device_info_dump into pretty printer") |
| a8c9b8496954 ("drm/i915: Add pretty printer for device info flags") |
| b68763741aa2 ("drm/i915: Restore GT performance in headless mode with DMC loaded") |
| b46a33e271ed ("drm/i915/pmu: Expose a PMU interface for perf queries") |
| dd57602efbce ("drm/i915: Switch fbc over to for_each_new_intel_plane_in_state()") |
| ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/") |
| b1e01595a66d ("drm/i915: Redo plane sanitation during readout") |
| 51f5a0963984 ("drm/i915: Add .get_hw_state() method for planes") |
| 79e6770cb1f5 ("drm/i915: Remove obsolete ringbuffer emission for gen8+") |
| f577a03ba920 ("drm/i915: fix 64bit divide") |
| b03ec3d67ab8 ("drm/i915: There is only one fault register from GEN8 onwards") |
| dab91783338b ("drm/i915: expose command stream timestamp frequency to userspace") |
| 5888576b0b5f ("drm/i915: fix register naming") |
| d2b4b97933f5 ("drm/i915: Record the default hw state after reset upon load") |
| cc6a818ad6bd ("drm/i915: Move intel_init_clock_gating() to i915_gem_init()") |
| f58d13d57179 ("drm/i915: Move GT powersaving init to i915_gem_init()") |
| 1803fcbca2e4 ("drm/i915: Define an engine class enum for the uABI") |
| bccd3b831185 ("drm/i915: Use trace_printk to provide a death rattle for GEM") |
| f72b84c677d6 ("drm/i915: Move init_clock_gating() back to where it was") |
| 0397ac13dd47 ("drm/i915: Make GuC log part of the uC error state") |
| 7d41ef3479a6 ("drm/i915: Add Guc/HuC firmware details to error state") |
| a4598d17551a ("drm/i915: Rename helpers used for unwinding, use macro for can_preempt") |
