| edf1e0008264 ("drm/amdgpu: value of amdgpu_sriov_vf cannot be set into F32_POLL_ENABLE") |
| bb97ab42ac5d ("drm/amdgpu: activate paging queue on SDMA v4") |
| d425e7d8de53 ("drm/amdgpu: add some [WR]REG32_SDMA macros to sdma_v4_0.c") |
| 998d3fd4f8ce ("drm/amdgpu: remove SRIOV specific handling from sdma_v4_0_gfx_resume") |
| 09f0b4ffd41e ("drm/amdgpu: remove non gfx specific handling from sdma_v4_0_gfx_resume") |
| 51235849d995 ("drm/amdgpu: fix sdma v4 startup under SRIOV") |
| 1cf0abb6c983 ("drm/amdgpu/sdma: simplify sdma instance setup") |
| 3760f76cbebb ("drm/amdgpu: Move IH clientid defs to separate file") |
| 57adc4cef617 ("drm/amdgpu: change amdgpu_ttm_set_active_vram_size") |
| c396ef9bf317 ("drm/amdgpu: move some functions into amdgpu_ttm.h") |
| f8f4b9a679e5 ("drm/amdgpu: Map all visible VRAM at startup") |
| 6f31fe6ec6ee ("drm/amdgpu: Correct sdma_v4 get_wptr(v2)") |
| 770d13b19fdf ("drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.h") |
| da320625de81 ("drm/amdgpu: remove agp_base") |
| b1d128689f9c ("drm/amdgpu: adjust HDP write queue flushing for tlb invalidation") |
| fb8baefc7b2d ("drm/amdgpu: use %pap format string for phys_addr_t") |
| 30f1c0421ec5 ("drm/amdgpu: Implement get_local_mem_info") |
| 24562523688b ("Revert "drm/amd/amdgpu: set gtt size according to system memory size only"") |
| 6a42fd6fbf53 ("drm/amdgpu: implement 2+1 PD support for Raven v3") |
| f5ec697e3702 ("drm/amdgpu: move fw_reserve functions to amdgpu_ttm.c") |
| 2543e28a81b8 ("drm/amdgpu: rename amdgpu_*_location functions") |
| 9c3f2b54746f ("drm/amdgpu: rename amdgpu_program_register_sequence") |
| a7ea6548a5d3 ("drm/amdgpu: setup the shared and private apertures on gfx9") |
| bf383fb64e7c ("drm/amdgpu: convert nbio to use callbacks (v2)") |
| 74e1d67c73b9 ("drm/amdgpu: make function names consistent in nbio files") |
| 3de676d8e71c ("drm/amdgpu: allow get_vm_pde to change flags as well") |
| 6989f2460f7d ("drm/amdgpu: batch PDE updates again") |
| 78eb2f0c719e ("drm/amdgpu: remove keeping the addr of the VM PDs") |
| 8f19cd78c986 ("drm/amdgpu: remove last_entry_used from the VM code") |
| b852f3d3fb5d ("drm/amdgpu: update one PDE at a time v2") |
| 94c6f5e4d157 ("drm/amdgpu: stop joining PDEs") |
| 946a4d5b3010 ("drm/amdgpu: Avoid use SOC15_REG_OFFSET in static const array") |
| b466107e8be1 ("drm/amdgpu: Use dynamic IP offset for register access on SOC15") |
| 4522824c488e ("drm/amdgpu: Dynamic initialize IP base offset") |
| 5f97fc0e0325 ("drm/amd/amdgpu: set gtt size according to system memory size only") |
| f3368128bace ("drm/amdgpu: move validation of the VM size into the VM code") |
| 36539dcea322 ("drm/amdgpu: choose number of VM levels based on VM size") |
| b38f41ebb8d0 ("drm/amdgpu: unify VM size handling of Vega10 with older generation") |
| 6af046d26f34 ("drm/amdgpu: use the new TTM bytes moved counter v2") |
| c13c55d61186 ("drm/ttm: use an operation context for ttm_bo_mem_space v2") |
| 19be55701071 ("drm/ttm: add operation ctx to ttm_bo_validate v2") |
| 8cdbad98c523 ("drm/amd/powerplay: Followup fixes to mc_reg_address") |
| 47e8788b4924 ("drm/amd/powerplay: Fix buffer overflows with mc_reg_address") |
| 235943189db8 ("drm/amdgpu: fix VCE buffer placement restrictions v2") |
| 3d647c8f9301 ("drm/amdgpu: remove VRAM size reduction v2") |
| 1144b63a162c ("drm/ttm: cleanup ttm_bo_driver.h") |
| ba87349ed31e ("drm/ttm: cleanup coding style in ttm_bo_api.h") |
| 9921167d9086 ("drm/amdgpu:cleanup unused stack var") |
| f59548c8824c ("drm/amdgpu:fix NULL pointer access during drv remove") |
| 11c6b82afb4c ("drm/amdgpu:cleanup stolen vga memory finish") |
