| d175d699df07 ("RISC-V: Rename and move plic_find_hart_id() to arch directory") | |
| ccbe80bad571 ("irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline") | |
| 6a1ce99dc4bd ("RISC-V: Don't enable all interrupts in trap_init()") | |
| a4c3733d32a7 ("riscv: abstract out CSR names for supervisor vs machine mode") |