| 4fd334122399 ("drm/amd/display: program manual trigger only for bottom most pipe") |
| e63e2491ad92 ("drm/amd/display: Ensure DRR triggers in BP") |
| 313a9a21ff46 ("drm/amd/display: Add GSL source select registers") |
| 6476a7c8f031 ("drm/amd/display: Program VTG params after programming Global Sync") |
| e7e10c464a48 ("drm/amd/display: stop external access to internal optc sync params") |
| db819940b0ef ("drm/amd/display: move signal type out of otg dlg params") |
| 09aef2c48e79 ("drm/amd/display: Compensate for pre-DCE12 BTR-VRR hw limitations. (v3)") |
| d2574c33bb71 ("drm/amd/display: In VRR mode, do DRM core vblank handling at end of vblank. (v2)") |
| 66b0c973d7f7 ("drm/amd/display: Prevent vblank irq disable while VRR is active. (v3)") |
| e854194c8b6e ("drm/amd/display: Update VRR state earlier in atomic_commit_tail.") |
| 74aa7bd4c6f7 ("drm/amd/display: Make stream commits call into DC only once") |
| 7b19bba58f77 ("drm/amd/display: Use vrr friendly pageflip throttling in DC.") |
| d6001aed2663 ("drm/amd/display: Refactor for setup periodic interrupt.") |
| 240d09d070a7 ("drm/amd/display: Ungate stream before programming registers") |
| a122b62d8ac4 ("drm/amd/display: refactor out programming of vupdate interrupt") |
| 810ece19ee74 ("drm/amd/display: Calc vline position in dc.") |
| 056f05f65bf4 ("drm/amd/display: pass vline_config parameter by reference.") |
| 385d7eeaf147 ("drm/amd/display: Remove FreeSync timing changed debug output") |
| c7af5f77aecd ("drm/amd/display: Use the right surface for flip and FreeSync") |
| 4b5105036afb ("drm/amd/display: Don't leak memory when updating streams") |
| 8fde60b7f350 ("drm/amd/display: Add Vline1 interrupt source to InterruptManager") |
| d2c460e7537f ("drm/amd/display: Connect dig_fe to otg directly instead of calling bios") |
| b2e85302494a ("drm/amd/display: Know what a pageflip is") |
| bc7f670ee04c ("drm/amd/display: Perform plane updates only when needed") |
| 8a48b44cd00f ("drm/amd/display: Call into DC once per multiplane flip") |
| 7df7e505e82a ("drm/amd/display: Set requested plane state DCC params for GFX9") |
| cfdb60f76739 ("drm/amd/display: Remove unused parameter plane_states") |
| 380604e27bc9 ("drm/amd/display: Use 100 Hz precision for pipe pixel clocks") |
| ceb3dbb4690d ("drm/amd/display: remove sink reference in dc_stream_state") |
| ef32bc1c7516 ("drm/amd/display: Fix issue with VLine interrupt not firing") |
| 1c164f70825b ("drm/amd/display: Add pixel clock values to dtn logs") |
| da1043cf22d3 ("drm/amd/display: Fix runtime errors for diagnostic tests") |
| 9136e81e986a ("drm/amd/display: Use div_u64 for flip timestamp ns to ms") |
| 180db303ff46 ("drm/amd/display: Add below the range support for FreeSync") |
| 674e78acae0d ("drm/amd/display: Add fast path for cursor plane updates") |
| 65d38262b3e8 ("drm/amd/display: fbc state could not reach while enable fbc") |
| ecd0136bfdb5 ("drm/amd/display: Info frame cleanup") |
| bb47de736661 ("drm/amdgpu: Set FreeSync state using drm VRR properties") |
| eb3dc8978596 ("drm/amd/display: Use private obj helpers for dm_atomic_state") |
| c1ee92f94ce3 ("drm/amd: Add abm level drm property") |
| bbf854dc3570 ("drm/amd/display: Load DMCU IRAM") |
| cedde71cc61b ("drm/amd/display: Support amdgpu "max bpc" connector property (v2)") |
| e2306cc6a07a ("drm/amdgpu: Add amdgpu "max bpc" connector property (v2)") |
| 6ccda157732d ("drm/amd/display: Get backlight controller id from link") |
| 14fee4ca84ec ("drm/amd/display: Adjust stream enable sequence") |
| 6263f0fd0626 ("drm/amd/display: Consolidate two-pixels-per-container check") |
| 37cd85ce3322 ("drm/amd/display: Remove dc_stream_state->status") |
| 262485a50fd4 ("drm/amd/display: Expand dc to use 16.16 bit backlight") |
| b8592b48450b ("drm/amd/display: Initial documentation for AMDgpu DC") |
| 4f7129112c2a ("drm/amd/display: Fix potential nullptr error") |
