| 84667a416d42 ("PCI: dwc/tegra: Use common Designware port logic register definitions") | |
| c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194") | |
| ac37dde72177 ("PCI: dwc: Add API to notify core initialization completion") | |
| e966f7390da9 ("PCI: dwc: Refactor core initialization code for EP mode") | |
| ed22aaaede44 ("PCI: dwc: intel: PCIe RC controller driver") | |
| bbdb2f5ecdf1 ("PCI: Add #defines for Enter Compliance, Transmit Margin") | |
| 3efa7f1febe6 ("Merge branch 'lorenzo/pci/tegra'") |