blob: bcff052b0f4d8d585f6329b440f385932332c7b3 [file] [log] [blame]
871002d78881 ("phy: cadence: Sierra: Configure both lane cdb and common cdb registers for external SSC")
aead5fd6026d ("phy: cadence: Sierra: Modify register macro names to be in sync with Sierra user guide")
367da978713b ("phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoC")
380f57083c12 ("phy: cadence: Sierra: Use "regmap" for read and write to Sierra registers")