| 3f2c420596be ("bus: ti-sysc: Use PTR_ERR_OR_ZERO() to simplify code") |
| bb88b86c1f62 ("bus: ti-sysc: allow reset sharing across devices") |
| 4345f0dc015d ("bus: ti-sysc: rework the reset handling") |
| b6036314436b ("bus: ti-sysc: re-order the clkdm control around reset handling") |
| ea5a2e4d5467 ("bus: ti-sysc: Do rstctrl reset handling in two phases") |
| 8383e25994ef ("bus: ti-sysc: Add support for disabling module without legacy mode") |
| 2b2f7def058a ("bus: ti-sysc: Add support for missing clockdomain handling") |
| d59b60564cbf ("bus: ti-sysc: Add generic enable/disable functions") |
| b11c1ea1f636 ("bus: ti-sysc: Move rstctrl reset to happen later") |
| 93de83a21e76 ("bus: ti-sysc: Manage clocks for the interconnect target module in all cases") |
| a3e92e7b32f2 ("bus: ti-sysc: Allocate mdata as needed and do platform data based init later") |
| 1a5cd7c23cc5 ("bus: ti-sysc: Enable all clocks directly during init to read revision") |
| d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") |
| ff43728c4aa2 ("bus: ti-sysc: Move legacy platform data idling into separate functions") |
| 386cb76681ca ("bus: ti-sysc: Handle missed no-idle property in addition to no-idle-on-init") |
| b57250fa5eb3 ("ARM: OMAP2+: Allocate struct omap_hwmod based on dts data") |
| 513a4abb19d5 ("ARM: OMAP2+: Prepare class allocation for dynamically allocated modules") |
| 798bd175ab0d ("ARM: OMAP2+: Make interconnect target module allocation functions static") |
| f5e80203dadc ("bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS") |
| 40d9f9124822 ("bus: ti-sysc: Defer suspend as needed") |
| 596e7955692b ("bus: ti-sysc: Add support for software reset") |
| dc4c85eac6bc ("bus: ti-sysc: Show module information for suspend if DEBUG is enabled") |
| 7e27e5d05a13 ("bus: ti-sysc: Tag sdio and wdt with legacy mode for suspend") |
| d708bb14971c ("bus: ti-sysc: Detect UARTs for SYSC_QUIRK_LEGACY_IDLE quirk on omap4") |
| 5062236ec458 ("bus: ti-sysc: Add initial support for external resets") |
| ef55f8215a78 ("bus: ti-sysc: Improve suspend and resume handling") |
| e7420c2d4495 ("bus: ti-sysc: Tag some modules resource providers for noirq suspend") |
| 09dfe5810762 ("bus: ti-sysc: Add handling for clkctrl opt clocks") |
| 8b2830ba1703 ("bus: ti-sysc: Make child clock alias handling more generic") |
| 103fd8e7ac1f ("ARM: OMAP2+: Use signed value for sysc register offsets") |
| 695eea3d2c7f ("ARM: OMAP2+: Enable ti-sysc to use device tree data for smartreflex") |
| a88443068572 ("ARM: OMAP2+: Add checks for device tree based sysconfig data") |
| 8c87970543b1 ("ARM: OMAP2+: Add functions to allocate module data from device tree") |
| a885f0fe209f ("bus: ti-sysc: Handle some devices in omap_device compatible way") |
| ef70b0bdeaf8 ("bus: ti-sysc: Add support for platform data callbacks") |
| 76f0f772e469 ("bus: ti-sysc: Improve handling for no-reset-on-init and no-idle-on-init") |
| 62020f231232 ("bus: ti-sysc: Add suspend and resume handling") |
| 2c355ff6b6ca ("bus: ti-sysc: Add fck clock alias for children with notifier_block") |
| d060b40523dc ("ARM: OMAP2+: Prepare to pass auxdata for smartreflex") |
| c5a2de97fbd2 ("bus: ti-sysc: Add parsing of module capabilities") |
| 566a9b05e1fa ("bus: ti-sysc: Handle module quirks based dts configuration") |
| a7199e2b91de ("bus: ti-sysc: Detect i2c interconnect target module based on register layout") |
| 70a65240efb1 ("bus: ti-sysc: Add register bits for interconnect target modules") |
| 49a0a3d805df ("bus: ti-sysc: Make omap_hwmod_sysc_fields into sysc_regbits platform data") |
| bf8070522298 ("ARM: OMAP2+: Move all omap_hwmod_sysc_fields to omap_hwmod_common_data.c") |
| 684be5a48f49 ("bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove") |
| a4a5d493ebbc ("bus: ti-sysc: mark PM functions as __maybe_unused") |
| 0eecc636e5a2 ("bus: ti-sysc: Add minimal TI sysc interconnect target driver") |
| b6891523fe99 ("dt-bindings: bus: Minimal TI sysc interconnect target module binding") |
| fc66ce0b7204 ("ARM: OMAP2+: Add pdata-quirks for MMC/SD on DRA74x EVM") |
