| adc1639863e6 ("mmc: sdhci-pci: use generic sdhci_set_bus_width()") |
| 48d685a2ec2b ("mmc: sdhci-pci: Move a function to avoid later forward declaration") |
| d1e4f74f911d ("mmc: sdhci: Do not use spin lock in set_ios paths") |
| 0c62e6752d0c ("mmc: sdhci: Remove ->select_drive_strength() callback") |
| c959a6b00ff5 ("mmc: sdhci-pci: Don't re-tune with runtime pm for some Intel devices") |
| ac9f67b5800b ("mmc: sdhci-pci: Let devices define their own private data") |
| 5a436cc0af62 ("mmc: sdhci: Optimize delay loops") |
| e2ebfb2142ac ("mmc: sdhci: Do not disable interrupts while waiting for clock") |
| 2ce0c7b65505 ("mmc: sdhci-of-at91: Support external regulators") |
| db9bd1638115 ("mmc: sdhci-msm: Factor out sdhci_msm_hs400") |
| 0fb8a3d46b03 ("mmc: sdhci-msm: Factor out function to set/get msm clock rate") |
| b54aaa8a4fd8 ("mmc: sdhci-msm: Factor out sdhci_msm_hc_select_mode") |
| c31165d7400b ("mmc: sdhci-pci: Add support for HS200 tuning mode on AMD, eMMC-4.5.1") |
| 84ec048ba133 ("mmc: sdhci: Fix to handle MMC_POWER_UNDEFINED") |
| 3f23df72dc35 ("mmc: sdhci-pci: Use ACPI to get max frequency for Intel NI byt sdio") |
| 42b06496407c ("mmc: sdhci-pci: Add PCI ID for Intel NI byt sdio") |
| 02e4293dc013 ("sdhci: sdhci-msm: update dll configuration") |
| cc392c583d0f ("mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit") |
| abf270e5c626 ("mmc: sdhci-msm: Save the calculated tuning phase") |
| ff06ce417828 ("mmc: sdhci-msm: Add HS400 platform support") |
| b12d44db4b01 ("mmc: sdhci-msm: Add clock changes for DDR mode.") |
| edc609fd19e1 ("mmc: sdhci-msm: Implement set_clock callback for sdhci-msm") |
| fec796739740 ("mmc: sdhci: Factor out sdhci_enable_clk") |
| 80031bdeb764 ("mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback") |
| 83736352e0ca ("mmc: sdhci-msm: Update DLL reset sequence") |
| 29301f40cb9f ("mmc: sdhci-msm: Change poor style writel/readl of registers") |
