| 068e7f85234c ("clk: renesas: Remove use of ARCH_R8A7795") |
| 8040bf4091cd ("clk: renesas: Prepare for split of R-Car H3 config symbol") |
| 03975b72b4ac ("clk: renesas: Remove use of ARCH_R8A7796") |
| 2ba738d56db4 ("clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support") |
| 92d1ebae9abf ("clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960") |
| 20cc05ba04a9 ("clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor") |
| 331a53e05b67 ("clk: renesas: cpg-mssr: Add r8a774a1 support") |
| b9d0b84b3db8 ("clk: renesas: rcar-gen3: Add support for RCKSEL clock selection") |
| 38c79e2899a6 ("clk: renesas: rcar-gen3: Add support for OSC EXTAL predivider") |
| 3570a2af4737 ("clk: renesas: cpg-mssr: Add support for R-Car E3") |
| 5bf2fbbef50c ("clk: renesas: cpg-mssr: Add r8a77470 support") |
| 7ce36da900c0 ("clk: renesas: cpg-mssr: Add support for R-Car M3-N") |
| ce15783c510a ("clk: renesas: cpg-mssr: add R8A77980 support") |
| c50378efa9aa ("clk: renesas: r8a7796: Add Z2 clock") |
| 72f2a6b31544 ("clk: renesas: r8a7796: Add Z clock") |
| 1eadca3557f7 ("clk: renesas: r8a7795: Add Z2 clock") |
| 4003508b4f23 ("clk: renesas: r8a7795: Add Z clock") |
| 41ceeb5fef77 ("clk: renesas: rcar-gen3: Add Z2 clock divider support") |
| 3391891fa9c8 ("clk: renesas: rcar-gen3: Add Z clock divider support") |
| a115f6362cee ("clk: renesas: r8a7796: Add FDP clock") |
| 9f55b17ff638 ("clk: renesas: rcar-gen3: Restore SDHI clocks during resume") |
| 8d46e28fb508 ("clk: renesas: cpg-mssr: Add R8A77970 support") |
| d71e851d82c6 ("clk: renesas: cpg-mssr: Add R8A77995 support") |
| 696997e004d4 ("clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks") |
| 09a7dea9d58a ("clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3") |
| 2d6f25774332 ("clk: renesas: rcar-gen3-cpg: Refactor checks for accessing the div table") |
| f317880c5b2b ("clk: renesas: rcar-gen3-cpg: Drop superfluous variable") |
| 371dd373c6ed ("clk: renesas: Allow compile-testing of all (sub)drivers") |
| 2d75588a28c6 ("clk: renesas: r8a7794: Add new CPG/MSSR driver") |
| fd3c2f382643 ("clk: renesas: r8a7792: Add new CPG/MSSR driver") |
| 6449ab814148 ("clk: renesas: r8a7791/r8a7793: Add new CPG/MSSR driver") |
| d4e59f108e90 ("clk: renesas: r8a7790: Add new CPG/MSSR driver") |
| 4013047a65b3 ("clk: renesas: cpg-mssr: Document R-Car Gen2 support") |
| 80978a4be267 ("clk: renesas: Rework Kconfig and Makefile logic") |
| dcf6a00dffee ("clk: renesas: Do not build clk-div6 for R8A7792") |
| bb1953067c05 ("clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0") |
| 48d0341e4187 ("clk: renesas: cpg-mssr: Add support for fixing up clock tables") |
| cecbe87d7300 ("clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0") |
| 5f3a432a44b1 ("clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()") |
| 9127d54bb894 ("clk: renesas: cpg-mssr: Add R8A7745 support") |
| c0b2d75d2a4b ("clk: renesas: cpg-mssr: Add R8A7743 support") |
| 468389357480 ("clk: renesas: cpg-mssr: Add common R-Car Gen2 support") |
| a05de66ea69f ("Merge branch 'rcar-rst' into clk-renesas-for-v4.10") |
