| f4224a4cb16c ("drm/i915/display: Make WARN* drm specific where drm_device ptr is available") |
| cc80e3625695 ("drm/i915/lvds: use intel_de_*() functions for register access") |
| 6671c367a9be ("drm/i915/tgl: Select master transcoder for MST stream") |
| ee36c7c0c837 ("drm/i915/display: Share intel_connector_needs_modeset()") |
| 0314da782d48 ("drm/i915/dsc: fix DSC register selection for ICL DSI transcoders") |
| 979e94c1d64a ("drm/i915: Introduce intel_crtc_state_reset()") |
| 6643453987c4 ("drm/i915: Introduce intel_crtc_{alloc,free}()") |
| f44bfa7fbfbb ("drm/i915: s/intel_crtc/crtc/ in intel_crtc_init()") |
| fbacb15ea814 ("drm/i915/dsc: add basic hardware state readout support") |
| deaaff49198d ("drm/i915/dsc: make DSC source support helper generic") |
| 2d15f3925a4b ("drm/i915/dsc: add support for computing and writing PPS for DSI encoders") |
| 7a7b5be96fb6 ("drm/i915/dsc: move DP specific compute params to intel_dp.c") |
| ad457191015a ("drm/i915/display: Refactor intel_commit_modeset_disables()") |
| 3ca8f1918883 ("drm/i915/display/tgl: Fix the order of the step to turn transcoder clock off") |
| bee43ca4c1cc ("drm/i915: Clean up intel_{pre,post}_plane_update()") |
| 0e75fb8c03aa ("drm/i915: s/pipe_config/new_crtc_state/ intel_{pre,post}_plane_update()") |
| 60aca5741a69 ("drm/i915: Pass dev_priv to ilk_disable_lp_wm()") |
| d2432796dc72 ("drm/i915: Clean up arguments to nv12/scaler w/a funcs") |
| 78eaaba3cd78 ("drm/i915/display/mst: Move DPMS_OFF call to post_disable") |
| 50a7efb280a8 ("drm/i915/dp: Power down sink before disable pipe/transcoder clock") |
| e815aff59dcf ("drm/i915/display: Check the old state to find port sync slave") |
| 7a8fdb1f272b ("drm/i915: Change watermark hook calling convention") |
| ac4eead37965 ("drm/i915/dsb: remove atomic operations") |
| 0ccc42a2fd51 ("drm/i915: Preload LUTs if the hw isn't currently using them") |
| 75217f8d029b ("drm/i915/dsc: rename functions for consistency") |
| b0ab655c8716 ("drm/i915/dsc: split out encoder specific parts from DSC compute params") |
| 6aead5df0556 ("drm/i915/dsc: clean up rc parameter table access") |
| 074f51574e7a ("drm/i915/dsc: make parameter arrays const") |
| a687b4ef6e28 ("drm/i915/tgl: do not enable transcoder clock twice on MST") |
| f90a85e76c2a ("drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi.") |
| 7b3cb17a48dc ("drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw.") |
| 5b6edb88008f ("drm/i915: Add aliases for uapi and hw to plane_state") |
| 58d124ea2739 ("drm/i915: Complete crtc hw/uapi split, v6.") |
| 2225f3c6f1d7 ("drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi.") |
| 1326a92c3466 ("drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw.") |
| aa42a50add15 ("drm/i915: Perform manual conversions for crtc uapi/hw split, v2.") |
| 2b808b3a27d1 ("drm/i915: Add aliases for uapi and hw to crtc_state") |
| 3558cafc31ce ("drm/i915: Handle a few more cases for crtc hw/uapi split, v3.") |
| 4e380d080be4 ("drm/i915: Stop frobbing crtc->base.mode") |
| 25f899544fb4 ("drm/i915: Nuke 'mode' argument to intel_get_load_detect_pipe()") |
| b3545e086877 ("drm/i915/tgl: add support to one DP-MST stream") |
| 0f9ed3b2c9ec ("drm/i915/display/cnl+: Handle fused off DSC") |
| ee595888e1c2 ("drm/i915/display/icl+: Check if DMC is fused off") |
| 7a40aac1d77a ("drm/i915/display: Check if FBC is fused off") |
| 74393109a8c3 ("drm/i915/display: Handle fused off HDCP") |
| a20e26d8421a ("drm/i915: Add two spaces before the SKL_DFSM registers") |
| 7f9d4c08846e ("drm/i915: Fix i845/i865 cursor width") |
| 762dff2e6f43 ("drm/i915: Add support for half float framebuffers for ivb+ sprites") |
| 03b0ce9532ec ("drm/i915: Add support for half float framebuffers for gen4+ primary planes") |
| 99efd1c92b7a ("drm/i915: Eliminate skl_check_pipe_max_pixel_rate()") |
