| bae1106c37c6 ("clk: meson: mpll: add round closest support") |
| 88a4e1283681 ("clk: meson: migrate the audio divider clock to clk_regmap") |
| c763e61ae8cb ("clk: meson: migrate mplls clocks to clk_regmap") |
| 2513a28c108b ("clk: meson: migrate muxes to clk_regmap") |
| f06ddd2852b3 ("clk: meson: migrate dividers to clk_regmap") |
| 7f9768a54051 ("clk: meson: migrate gates to clk_regmap") |
| 161f6e5baabd ("clk: meson: add regmap to the clock controllers") |
| 14bd7b9c8d3f ("clk: meson: only one loop index is necessary in probe") |
| 332b32a23225 ("clk: meson: use devm_of_clk_add_hw_provider") |
| 323346d31d68 ("clk: meson: use dev pointer where possible") |
| 6c00e7b76021 ("clk: meson: add axg misc bit to the mpll driver") |
| 9d548d803847 ("clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()") |
| 348c898cb897 ("Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into clk-meson") |
