| e45e0003f60d ("drm/i915/tgl: Add DC3CO required register and bits") |
| 4ab4fa103217 ("drm/i915/psr: Make PSR registers relative to transcoders") |
| feb8846b3a4f ("drm/i915/dp: Expose force_dsc_enable through debugfs") |
| 98c0d19ec72c ("drm/i915/psr: Initialize PSR mutex even when sink is not reliable") |
| c0f6ffb2cd6a ("drm/i915: Remove unused VLV/CHV PSR registers") |
| 97a04e0d07c4 ("drm/i915: switch intel_wait_for_register to uncore") |
| d2d551c06f81 ("drm/i915: intel_wait_for_register_fw to uncore") |
| a2b4abfc626b ("drm/i915: switch uncore mmio funcs to use intel_uncore") |
| 6cc5ca768825 ("drm/i915: rename raw reg access functions") |
| 6ebc9692a7ad ("drm/i915: make raw access function work on uncore") |
| 25286aaca9ce ("drm/i915: move regs pointer inside the uncore structure") |
| 272c7e52302e ("drm/i915: reduce the dev_priv->uncore dance in uncore.c") |
| cb7ee69015aa ("drm/i915: make find_fw_domain work on intel_uncore") |
| f7de50278e5c ("drm/i915: make more uncore function work on intel_uncore") |
| 3ceea6a1b4d2 ("drm/i915: use intel_uncore for all forcewake get/put") |
| f568eeee5355 ("drm/i915: use intel_uncore in fw get/put internal paths") |
| 159367bb9e74 ("drm/i915: always use masks on FW regs") |
| fd79d93985e0 ("drm/i915/selftests: add test to verify get/put fw domains") |
| 06dd94cccdd1 ("drm/i915: Fix PSR2 selective update corruption after PSR1 setup") |
| 535d8d27c0e2 ("drm/i915: do not pass dev_priv to low-level forcewake functions") |
| 9be8644a14c6 ("drm/i915/icl: split combo and mg pll disable") |
| 036f8d567b6c ("drm/i915/icl: split pll enable in three steps") |
| d2ab5ebf46b4 ("drm/i915/icl: split combo and mg pll enable") |
| 510a75a5d2b8 ("drm/i915/icl: move MG pll hw_state readout") |
| 49a630b00bac ("drm/i915: Enable and Disable of HDCP2.2") |
| 09d56393c1d8 ("drm/i915: hdcp1.4 CP_IRQ handling and SW encryption tracking") |
| 9055aac76589 ("drm/i915: MEI interface implementation") |
| 04707f971636 ("drm/i915: Initialize HDCP2.2") |
| 4c719c256a0f ("drm/i915: Gathering the HDCP1.4 routines together") |
| 23ec9f52e522 ("drm/i915/psr: Execute the default PSR code path when setting i915_edp_psr_debug") |
| 584fca111d0c ("drm/i915/icl: use tc_port in MG_PLL macros") |
| eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex") |
| ade8a0f59844 ("drm/i915: Make all GPU resets atomic") |
| 8e525cb4a622 ("drm/i915/execlists: Move RPCS setup to context pin") |
| c25f0c6a0426 ("drm/i915/icl: do a posting read after irq install") |
| a81f781a3238 ("drm/i915/debugfs: Print PSR selective update status register values") |
| cc8853f57e00 ("drm/i915: Add PSR2 selective update status registers and bits definitions") |
| 47c6cd54efde ("drm/i915: Refactor PSR status debugfs") |
| 143c335ad27f ("drm/i915/i915_drv.h: switch to kernel types") |
| 6ddbb12e3f54 ("drm/i915: Fix wakeref cookie handling in debugfs/i915_forcewake_user") |
| 990290d124d5 ("drm/i915/dpll_mgr: switch to kernel types") |
| 739f3abdbfcf ("drm/i915: small isolated c99 types to kernel types switch") |
| 9f58892ea996 ("drm/i915: Pull all the reset functionality together into i915_reset.c") |
| 18bb2bccb549 ("drm/i915: Serialise concurrent calls to i915_gem_set_wedged()") |
| decd29e6b5fe ("drm/i915: Only dump GPU state on set-wedged if interesting") |
| fed85691b408 ("drm/i915: Fix the static code analysis warning in debugfs") |
| 0e6e0be4c952 ("drm/i915: Markup paired operations on display power domains") |
| c9d08cc3e339 ("drm/i915/selftests: Mark up rpm wakerefs") |
| 538ef96b9dae ("drm/i915/gem: Track the rpm wakerefs") |
| 6619c0075f78 ("drm/i915/perf: Track the rpm wakeref") |
