| 40b37136287b ("ASoC: tlv320aic32x4: Fix bdiv clock rate derivation") |
| 96c3bb00239d ("ASoC: tlv320aic32x4: Dynamically Determine Clocking") |
| fbafbf651727 ("ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions") |
| 9b484124ebd9 ("ASoC: tlv320aic32x4: Model BDIV divider in CCF") |
| a51b50062091 ("ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF") |
| fd2df3aeafa4 ("ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF") |
| 514b044cba66 ("ASoC: tlv320aic32x4: Model PLL in CCF") |
| c95e3a4b9629 ("ASoC: tlv320aic32x4: Properly Set Processing Blocks") |
| bf31cbfbe250 ("ASoC: tlv320aic32x4: Break out clock setting into separate function") |
