| 9f72f51d701c ("drm/amd/display: Refactor to call set PSR wait loop in dce_dmcu instead of dce_clocks") |
| 7db4dede6425 ("drm/amd/display: Add function to get PSR state") |
| ece22899a465 ("drm/amd/display: Disable PSR entry abort to prevent intermittent freezes") |
| 46df790c6b56 ("drm/amd/display: i2c/aux Remove link index.") |
| 15a27de250a5 ("drm/amd/display: Don't call PSR func if DMCU is off") |
| ff5ef9924866 ("drm/amdgpu/display: Enable DCN in DC") |
| 94267b3df7ee ("drm/amd/display: PSR Refactor") |
| 15350179f2fc ("drm/amd/display: always retrieve PSR cap") |
| 6848e9896b9c ("drm/amd/display: PSR Aux Channel and Static Screen Support Fix") |
| 7c7f5b15be65 ("drm/amd/display: Refactor edid read.") |
| 9fb8de78ed01 ("drm/amd/display: Remove get_connector_for_link.") |
| bddd696ddd43 ("drm/amd/display: Temporary disable PSR for HBR2 & HBR3") |
| d4e13b0db124 ("drm/amd/display: decouple per-crtc-plane model") |
| fd8cc371ede6 ("drm/amd/display: voltage request related change") |
| 667e1498a9d0 ("drm/amd/display: use CRTC_VERTICAL_INTERRUPT0 as VBLANK trigger.") |
| 5e141de45218 ("drm/amd/display: Rename bandwidth_calcs.h to dce_calcs.h") |
| 3c8c9d6cd1f9 ("drm/amd/display: using calculated values for VReady/Startup") |
| 3f8a94401667 ("drm/amd/display: support CP2520 pattern 2 for HBR2 compliance") |
| 8fa9ca2ec691 ("drm/amd/display: Remove DCE12 guards") |
| 2c8ad2d5a20c ("drm/amd/display: Enable DCE12 support") |
| b8fdfcc6a92c ("drm/amd/display: Add DCE12 core support") |
| 9a48d684482e ("drm/amd/display: Add DCE12 irq support") |
| ae79c310b1a6 ("drm/amd/display: Add DCE12 bios parser support") |
| 5ac3d3c9b79f ("drm/amd/display: move refclk from dc to resource_pool") |
| e8c963d6d970 ("drm/amd/display: refclock from bios firmwareInfoTable") |
| ece4f358cb57 ("drm/amd/display: Simplify some DMCU waits") |
| 3548f0731a2f ("drm/amd/display: DMCU PSR Refactor") |
| 4ef3a67b6a1a ("drm/amd/display: rename bandwidth_calcs.c to dce_calcs.c (v2)") |
| 2b230ea3e76f ("drm/amd/display: Add query_ddc_data function") |
| 4a9054dda6df ("drm/amd/display: Fix 64-bit division, yet again") |
| 26ada804d62e ("drm/amd/display: Fix missing fcn pointer on DCE8") |
| 8f16f28936af ("drm/amd/display: Set ignore_msa_timing flag for freesync modes") |
| e266fdf69447 ("drm/amd/display: Enable regamma 25 segments and use double buffer.") |
| 871ffb606a3e ("drm/amd/display: fix psr status wait") |
| a99240d5f8e1 ("drm/amd/display: use disp clock value in context rather than bw_results") |
| 0f56b418ef49 ("drm/amd/display: add dcfclk reporting to pplib") |
| 90b9d7fa107d ("drm/amd/display: Support ABM without PPlib") |
| 998166a6116b ("drm/amd/display: Make new pixel clock more obvious") |
| 6728b30c974e ("drm/amd/display: Move backlight from encoder to ABM") |
| 5e7773a219f7 ("drm/amd/display: DMCU Compile and Load") |
| bb9042da8e8a ("drm/amd/display: Change power gating off sequence to fix hang") |
| c7141c47d371 ("drm/amd/display: Fix compile warnings") |
| cad3c7a99725 ("drm/amd/display: Remove power gating debug flags") |
| 3d761e7990a2 ("drm/amd/display: Clean index in irq init loop") |
| b57de80a5147 ("drm/amd/display: Register on VLBLANK ISR.") |
| b10d51f8b094 ("drm/amd/display: Add interrupt entries for VBLANK isr.") |
| e0d7ce783a88 ("drm/amd/display: enable clock gating and dchubp power gating") |
| 7a1c37e00a66 ("drm/amd/display: Disable Modules at Runtime") |
| fcd2f4bf8bbe ("drm/amd/display: Output Transfer Function Regamma Refactor") |
| ab2541b67395 ("drm/amd/display: Remove dc_target object") |
