| 08d238e68989 ("drm/amd/display: Clock does not lower in Updateplanes") |
| e21db6dbdf43 ("drm/amd/display: move dcn watermark programming to set_bandwidth") |
| 7144d3cfff7d ("drm/amd/display: separate out wm change request dcn workaround") |
| d7b539d34ace ("drm/amd/display: add safe_to_lower support to dcn wm programming") |
| 12c3130dd6f3 ("drm/amd/display: move dcn1 dispclk programming to dccg") |
| d578839ca014 ("drm/amd/display: get rid of cur_clks from dcn_bw_output") |
| e2e0a1dcd322 ("drm/amd/display: move clock programming from set_bandwidth to dccg") |
| 6ca11246180a ("drm/amd/display: rename display clock block to dccg") |
| fab55d61b9f0 ("drm/amd/display: redesign dce/dcn clock voltage update request") |
| 765b26836430 ("drm/amd/display: replace clocks_value struct with dc_clocks") |
| 5099114ba3b2 ("drm/amdgpu/display: drop DRM_AMD_DC_FBC kconfig option") |
| 1a05873f21d6 ("drm/amd/display: Refactor audio programming") |
| 87ac8fb08bc7 ("drm/amd/display: disable FBC on underlay pipe") |
| a47654633596 ("drm/amd/display: add calculated clock logging to DTN") |
| 0a93dc7f595f ("drm/amd/display: add rq/dlg/ttu to dtn log") |
| 2fa417324abd ("drm/amd/display: Remove PRE_VEGA flag") |
| 5d4b05ddd826 ("drm/amd/display: Add Dynamic debug prints") |
| 3032deb52a6b ("drm/amd/display: Correct print types in DC_LOGS") |
| 6da2b9332c57 ("amdgpu/dm: Default PRE_VEGA ASIC support to 'y'") |
| 17ac50368f83 ("drm/amd/display: clean up dcn pplib notification call") |
| 45bb8dd696ea ("drm/amd/display: Set disp clk in a safe way to avoid over high dpp clk. (v2)") |
| 713d451d2df3 ("drm/amd/display: Use MACROS instead of dm_logger") |
| f0ba51e83a18 ("drm/amd/display: Move DTRACE and dml_print defines") |
| 8e437c799158 ("drm/amd/display: Modified set bandwidth sequence.") |
| 623a7e96cd73 ("drm/amd/display: Remove 300Mhz minimum disp clk limit.") |
| aa5a57773042 ("drm/amd/display: Vari-bright looks disabled near end of MM14") |
| ea74e15fb547 ("drm/amd/display: Default HDMI6G support to true. Log VBIOS table error.") |
| 28d4175413ef ("drm/amd/display: fix dcn1 dppclk when min dispclk patch applies") |
| 1296423bf23c ("drm/amd/display: define DC_LOGGER for logger") |
| 2f3fd67a8af2 ("drm/amd/display: Use MACROS instead of dm_logger") |
| 15cf3974eb06 ("drm/amd/display: add diags clock programming") |
| f553e6810259 ("drm/amd/display: add per pipe dppclk") |
| ea7ea2a8cac1 ("drm/amd/display: fix missing az disable in reset backend") |
| cf1df90f35ac ("drm/amd/display: Check DCN PState ASSERT failure") |
| 3d53f424796b ("drm/amd/display: update cur_clock correctly within set bandwidth") |
| fdf0c1c2f75e ("drm/amd/display: Add logging for aux DPCD access") |
| e923a355aa5d ("drm/amd/display: provide an interface to query firmware version") |
| 3e332d3a5a64 ("drm/amd/display: Make FBC work without fbdev emulation") |
| 4cac1e6d2ffa ("drm/amd/display: Keep eDP stream enabled during boot.") |
| 91d4a1290034 ("drm/amd/display: boot up/S4 fix mainlink off before BL.") |
| 25b304471846 ("drm/amd/display: enable #PME code path for RV.") |
| c5fc7f59a71a ("drm/amd/display: resume from S3 bypass power down HW block.") |
| 5180d4a4766d ("drm/amd/display: add eDP 1.2+ polling for T7") |
| f774b3398264 ("drm/amd/display: remove unused function prototypes") |
| 24a30505f312 ("drm/amd/display: Check hubp in pipe_ctx not in res_pool.") |
| 69b9723a81e7 ("drm/amd/display: wait for T9 after backlight off mainlink blank.") |
| ac916c914c31 ("drm/amd/display: Remove return when no EDID read.") |
| 367e66870e9c ("drm/amdgpu: remove DC special casing for KB/ML") |
| 41b497421a1f ("drm/amd/display: eDP sequence BL off first then DP blank.") |
| cf1835f03ffb ("drm/amd/display: fix backlight not off at resume from S4") |
