| b4d3acaa7333 ("drm/i915/gt: Pull sseu context updates under gt") |
| feed5c7be22c ("drm/i915: Pin the context as we work on it") |
| de5825beae9a ("drm/i915: Serialise with engine-pm around requests on the kernel_context") |
| 07779a76ee1f ("drm/i915: Mark up the calling context for intel_wakeref_put()") |
| c9ad602feabe ("drm/i915: Split i915_active.mutex into an irq-safe spinlock for the rbtree") |
| 3fb33cd32ffd ("drm/i915/selftests: Add coverage of mocs registers") |
| 3c7a44bbbfa7 ("drm/i915/selftests: Perform some basic cycle counting of MI ops") |
| d79e1bd676f0 ("drm/i915/pmu: Only use exclusive mmio access for gen7") |
| c1c82d267ae8 ("drm/i915/pmu: Cheat when reading the actual frequency to avoid fw") |
| 38813767c7c5 ("drm/i915/selftests: Flush all active callbacks") |
| f05816cbbcd0 ("drm/i915/selftests: Spin on all engines simultaneously") |
| 164a4128869f ("drm/i915/selftests: Pretty print the i915_active") |
| 6804da20bb54 ("drm/i915/selftests: Select a random engine for testing memory regions") |
| c8c197d42646 ("drm/i915/selftests: Use a random engine for GEM coherency tests") |
| 39f9547a339a ("drm/i915/selftests: Measure basic throughput of blit routines") |
| 3e7abf814193 ("drm/i915: Extract GT render power state management") |
| 0e99f939f08f ("drm/i915/selftests/blt: add some kthreads into the mix") |
| 340be48f2c5a ("drm/i915/selftests: add write-dword test for LMEM") |
| 01377a0d7e66 ("drm/i915/lmem: support kernel mapping") |
| b908be543e44 ("drm/i915: support creating LMEM objects") |
| 2871ea85c119 ("drm/i915/gt: Split intel_ring_submission") |
| 7f47211e73e9 ("drm/i915/selftests: Flush any i915_active callback work as well") |
| 058179e72e09 ("drm/i915/gt: Replace hangcheck by heartbeats") |
| 2e0986a58cc4 ("drm/i915/gem: Cancel contexts when hangchecking is disabled") |
| 3a7a92aba8fb ("drm/i915/execlists: Force preemption") |
| a8c51ed22b0e ("drm/i915/gt: Try to more gracefully quiesce the system before resets") |
| f79520bb3337 ("drm/i915/selftests: Synchronize checking active status with retirement") |
| adcb52649498 ("drm/i915: Pass intel_gt to intel_engines_init_mmio") |
| b5e8e954eb67 ("drm/i915/gt: Introduce barrier pulses along engines") |
| 0dc3c562aa95 ("drm/i915: Extract GT ring management") |
| 3aae9d08532c ("drm/i915: enumerate and init each supported region") |
| 253a774bb08b ("drm/i915/execlists: Don't merely skip submission if maybe timeslicing") |
| 5d904e3c5d40 ("drm/i915: Pass in intel_gt at some for_each_engine sites") |
| a50134b1983b ("drm/i915: Make for_each_engine_masked work on intel_gt") |
| e9768bfe875f ("drm/i915/selftests: Teach requests to use all available engines") |
| 5f65d5a6e4bd ("drm/i915/selftests: Teach timelines to take intel_gt as its argument") |
| bb3d4c9d636b ("drm/i915/selftests: Teach workarounds to take intel_gt as its argument") |
| 1357fa8136ea ("drm/i915/selftests: Teach execlists to take intel_gt as its argument") |
| 2229adc81380 ("drm/i915/execlist: Trim immediate timeslice expiry") |
| 8574685547bd ("drm/i915/selftests: Drop stale struct_mutex") |
| 3c00660db183 ("drm/i915/execlists: Assert tasklet is locked for process_csb()") |
| 9506c23dfaf5 ("drm/i915/selftests: Check that GPR are cleared for new contexts") |
| 9c27462c896d ("drm/i915/selftests: Check known register values within the context") |
| 15d0ace1f876 ("drm/i915/perf: execute OA configuration from command stream") |
| daed3e44396d ("drm/i915/perf: implement active wait for noa configurations") |
| 6a45008ab7bb ("drm/i915/perf: allow for CS OA configs to be created lazily") |
| 52111c4628a2 ("drm/i915/perf: Store shortcut to intel_uncore") |
| 9a61363a6310 ("drm/i915/perf: store the associated engine of a stream") |
| 86027e312c36 ("drm/i915/selftests: Check that registers are preserved between virtual engines") |
| c36eebd9ba5d ("drm/i915/gt: execlists->active is serialised by the tasklet") |
