| b79ebe74e1c4 ("drm/i915/ddi: Simplify get_encoder_power_domains()") |
| 525280552b21 ("drm/i915/ddi: Get AUX power domain for DP main link too") |
| 54fd3149598c ("drm/i915/psr: Control PSR interrupts via debugfs") |
| e04f7ece1c45 ("drm/i915: Enable edp psr error interrupts on bdw+") |
| fc34044248b6 ("drm/i915: Enable edp psr error interrupts on hsw") |
| 26e5378d1155 ("drm/i915/psr: Cache sink synchronization latency") |
| fe36181be371 ("drm/i915/psr: Use PSR2 macro for PSR2") |
| 95f28d2ec75a ("drm/i915/psr: Do not override PSR2 sink support") |
| 5e87325f5c57 ("drm/i915/psr/cnl: Enable Y-coordinate support in source") |
| aee3bac0a3a8 ("drm/i915/psr: Tie PSR2 support to Y coordinate requirement") |
| 6ce9b78a7388 ("drm/i915/psr: Nuke aux frame sync") |
| d544e918ff13 ("drm/i915/psr: Remove open-coded PSR AUX transactions for SKL+") |
| b90eed08d8d0 ("drm/i915/psr: Move PSR aux setup to it's own function.") |
| 5baf63cc4d78 ("drm/i915/psr: Use more PSR HW tracking.") |
| caa1fd660e6f ("drm/i915/psr: Display WA 0884 applied broadly for more HW tracking.") |
| c4932d7956d8 ("drm/i915/psr: Don't avoid PSR when PSR2 conditions are not met.") |
| 8cef3e5c0d19 ("drm/i915/psr2: Fix max resolution supported.") |
| 06d058e1a008 ("drm/i915/psr: Check for power state control capability.") |
| e2770e2e0509 ("drm/i915/psr: Check for the specific AUX_FRAME_SYNC cap bit.") |
| 77fe36ff0470 ("drm/i915/psr: Extract PSR DPCD initialization and move it to intel_psr.c") |
| 51e98eb85161 ("drm/i915/frontbuffer: Mark frontbuffer flush and invalidate with might_sleep()") |
| b891d5e46c96 ("drm/i915/psr: New power domain for AUX IO.") |
| c56b89f16dd0 ("drm/i915: Use INTEL_GEN everywhere") |
| a324fcaca314 ("drm/i915/cnl: Add AUX-F support") |
| 0519c102f528 ("drm/i915: Implement display w/a #1143") |
| 861023e0b6c4 ("drm/i915/psr: Don't name status or debug registers like control registers.") |
| 4371d89601c3 ("drm/i915/psr: CAN_PSR() macro to check for PSR source and sink support.") |
| 457f1e5f4702 ("drm/i915/psr: Kill psr.source_ok flag.") |
| 35954e88bc50 ("drm/i915: Runtime disable for eDP DRRS") |
| 09a28bd9e802 ("drm/i915: Move display related definitions to dedicated header") |
| b74eeeb6b1ab ("drm/i915: Move some utility functions to i915_util.h") |
| 14c6547d6df6 ("drm/i915/psr: Fix register name mess up.") |
| b68763741aa2 ("drm/i915: Restore GT performance in headless mode with DMC loaded") |
| dd57602efbce ("drm/i915: Switch fbc over to for_each_new_intel_plane_in_state()") |
| ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/") |
| b1e01595a66d ("drm/i915: Redo plane sanitation during readout") |
| 51f5a0963984 ("drm/i915: Add .get_hw_state() method for planes") |
| 8f4f27970723 ("drm/i915: Nuke intel_digital_port->port") |
| adc103047e58 ("drm/i915: Eliminate some encoder->crtc usage from DP code") |
| 436009b578ab ("drm/i915/cnl: Force DDI_A_4_LANES when needed.") |
| 081dfcfafcbb ("drm/i915: Pass the encoder type explicitly to skl_set_iboost()") |
| 975786ee0e25 ("drm/i915: Extract intel_ddi_get_buf_trans_hdmi()") |
| d8fe2c7f3365 ("drm/i915: Relocate intel_ddi_get_buf_trans_*() functions") |
| 31d1d3c8862e ("drm/i915: adjust get_crtc_fence_y_offset() to use base.y instead of crtc.y") |
| 779d4d8f083e ("drm/i915: Unify skylake plane disable") |
| 9a8cc576002a ("drm/i915: Unify skylake plane update") |
| e288881b08dc ("drm/i915: dspaddr_offset doesn't need to be more than local variable") |
| bf0a5d4b223d ("drm/i915: move adjusted_x/y from crtc to cache.") |
| 1210d3889077 ("drm/i915: Use bdw_ddi_translations_fdi for Broadwell") |
| 15d05f0e77fb ("drm/i915: Split intel_enable_ddi() into DP and HDMI variants") |
