| 157e72e831cb ("drm/amdgpu: add sdma ip block for sienna_cichlid (v5)") |
| 933c8a93e241 ("drm/amdgpu: add gfx ip block for sienna_cichlid (v3)") |
| 757b3af8ecb4 ("drm/amdgpu: add ih ip block for sienna_cichlid") |
| 0b3df16b5abc ("drm/amdgpu: add gmc ip block for sienna_cichlid") |
| 2e1ba10e9271 ("drm/amdgpu/soc15: add common ip block for sienna_cichlid") |
| 43a10b15d442 ("amd/amdgpu: Limit rlcg write registers only for nv12") |
| 1675c3a24d07 ("drm/amdgpu: stop disable the scheduler during HW fini") |
| 2e0cc4d48b91 ("drm/amdgpu: revise RLCG access path") |
| 1da7d4a8ab79 ("drm/amdgpu: Write blocked CP registers using RLC on VF") |
| 460c484f2411 ("drm/amdgpu: Initialize SPM_VMID with 0xf (v2)") |
| c25edaaf75af ("drm/amdgpu/gfx10: re-init clear state buffer after gpu reset") |
| 387d40fd6fb6 ("drm/amdgpu/gfx10: explicitly wait for cp idle after halt/unhalt") |
| 4effa8dbc117 ("drm/amdgpu/vcn2.5: fix the enc loop with hw fini") |
| 14f43e8f88c5 ("drm/amdgpu: move JPEG2.5 out from VCN2.5") |
| b0f3cd3191cd ("drm/amdgpu: remove unnecessary JPEG2.0 code from VCN2.0") |
| 6ac27241106b ("drm/amdgpu: add JPEG v2.0 function supports") |
| bb0db70f3f75 ("drm/amdgpu: separate JPEG1.0 code out from VCN1.0") |
| 9d9cc9b8fe85 ("drm/amdgpu: add amdgpu_jpeg and JPEG tests") |
| 88a1c40a04de ("drm/amdgpu: add JPEG HW IP and SW structures") |
| ad02e08e0578 ("drm/amdgpu: Report vram vendor with sysfs (v3)") |
| fd287c8cd248 ("drm/amdgpu/vcn: use amdgpu_ring_test_helper") |
| 923c087a1f1e ("drm/amdgpu: Add the HDP flush support for Navi") |
| 631cdbd27e92 ("drm/amdgpu/atomfirmware: simplify the interface to get vram info") |
| bd5520273cea ("drm/amdgpu/atomfirmware: use proper index for querying vram type (v3)") |
| 393993ac0cc9 ("drm/amdgpu/SRIOV: Navi12 SRIOV VF gets GTT base") |
| 9d1b3c78052e ("drm/amdgpu: reserve at least 4MB of VRAM for page tables v2") |
| bebc07628545 ("drm/amdgpu: switch to new amdgpu_nbio structure") |
