| 01254b6d6bb3 ("PCI: tegra: Set DesignWare IP version") |
| aeaa0bfe8965 ("PCI: dwc: Move N_FTS setup to common setup") |
| d439e7edd134 ("PCI: dwc/intel-gw: Drop unused max_width") |
| 441e48fdf0b4 ("PCI: dwc: Set PORT_LINK_DLL_LINK_EN in common setup code") |
| 39bc5006501c ("PCI: dwc: Centralize link gen setting") |
| 84667a416d42 ("PCI: dwc/tegra: Use common Designware port logic register definitions") |
| fb7652327101 ("PCI: dwc: Remove hardcoded PCI_CAP_ID_EXP offset") |
| cff9244432e8 ("PCI: dwc: Ensure FAST_LINK_MODE is cleared") |
| 6ffc02d23631 ("PCI: dwc: Add a 'num_lanes' field to struct dw_pcie") |
| 936fa5cd7b8e ("PCI: dwc: Convert to devm_platform_ioremap_resource_byname()") |
| 51ed2c2b6026 ("PCI: qcom: Support pci speed set for ipq806x") |
| c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194") |
| ac37dde72177 ("PCI: dwc: Add API to notify core initialization completion") |
| e966f7390da9 ("PCI: dwc: Refactor core initialization code for EP mode") |
| c11dfed9caa2 ("Merge branch 'remotes/lorenzo/pci/qcom'") |
