| 1c6e527d6947 ("drm/i915/dp: Move intel_dp_set_signal_levels() to intel_dp_link_training.c") |
| 0a5991f5d022 ("drm/i915: Simplify the link training functions") |
| a621860a5eb8 ("drm/i915: Plumb crtc_state to link training") |
| 6a41121f0550 ("drm/i915: Split TGL DKL PHY buf trans per output type") |
| 4669f5c2b7ed ("drm/i915: Split TGL combo PHY buf trans per output type") |
| ba30075d8d84 ("drm/i915: Split EHL combo PHY buf trans per output type") |
| 5ee3e1daa816 ("drm/i915: Split ICL MG PHY buf trans per output type") |
| 6ed9aefa69fc ("drm/i915: Split ICL combo PHY buf trans per output type") |
| 193af12cd681 ("drm/i915: Shove the PHY test into the hotplug work") |
| 7ac469a0f7c6 ("drm/i915: Make intel_dp_process_phy_request() static") |
| 945b18fb4803 ("drm/i915: Fix TGL DKL PHY DP vswing handling") |
| b7feffd584ba ("drm/i915: Configure DP 1.3+ protocol converted HDMI mode") |
| 2a498ab49256 ("drm/i915/display/ehl: Use EHL DP tables for eDP ports without low power support") |
| a8c90bc11990 ("drm/i915/display/tgl: Use TGL DP tables for eDP ports without low power support") |
| 04dfb1acbae6 ("drm/i915/tgl: Add new voltage swing table") |
| 81619f4a75ed ("drm/i915/display: Implement HOBL") |
| 963501bdd094 ("drm/i915/ddi: Don't frob the DP link scramble disabling flag") |
| a133c6988f70 ("drm/i915: WARN if max vswing/pre-emphasis violates the DP spec") |
| f0e86e052097 ("drm/i915/display: Remove port and phy from voltage swing functions") |
| a8143150faa7 ("drm/i915/display: Replace drm_i915_private in voltage swing functions by intel_encoder") |
| 7801f3b792b0 ("drm/i915/display: prefer dig_port to reference intel_digital_port") |
| 0ba7ffea2d11 ("drm/i915/display: remove alias to dig_port") |
| b08239b2f471 ("drm/i915: HDCP: retry link integrity check on failure") |
| 3625a1f5bf6b ("drm/i915: Fix DP_TRAIN_MAX_{PRE_EMPHASIS,SWING}_REACHED handling") |
| 94641eb6c696 ("drm/i915/display: Fix the encoder type check") |
| c980216dd224 ("drm/i915/icl: Disable DIP on MST ports with the transcoder clock still on") |
| 9fa6769952ee ("drm/i915/tgl: Add HBR and HBR2+ voltage swing table") |
| e2db55244e0f ("drm/i915: Replace some hand rolled max()s") |
| f6adb5f06195 ("drm/i915: Reverse preemph vs. voltage swing preference") |
| 53de0a20c8cd ("drm/i915: Add {preemph,voltage}_max() vfuncs") |
| 33520eae45f1 ("drm/i915: Fix ivb cpu edp vswing") |
| da882e6bb968 ("drm/i915: Fix ibx max vswing/preemph") |
| d1d08a4994a8 ("drm/i915: Fix cpt/ppt max pre-emphasis") |
| 5f4ae2704d59 ("drm/i915: Identify Cometlake platform") |
| 250a353cd85f ("drm/i915/tgl: Update TC DP vswing table") |
| a09e89e97827 ("drm/i915/rkl: Add PCH support") |
| ae9b6cfe1352 ("drm/i915: Fix AUX power domain toggling across TypeC mode resets") |
| 7a00e68b4317 ("drm/i915/psr: Use new DP VSC SDP compute routine on PSR") |
| cafac5a98361 ("drm/i915/dp: Add compute routine for DP PSR VSC SDP") |
| fa37a213275c ("drm/i915: Stop sending DP SDPs on ddi disable") |
| 76d45d0665d2 ("drm/i915: Program DP SDPs on pipe updates") |
| 1bf3657c03dd ("drm/i915: Program DP SDPs with computed configs") |
| 1b404b7dbb10 ("drm/i915/dp: Read out DP SDPs") |
| c7e8a3d674fb ("drm/i915: Use stashed away hpd isr bits in intel_digital_port_connected()") |
| edc0e09c6ba8 ("drm/i915: Turn intel_digital_port_connected() in a vfunc") |
| 690d22dafa88 ("drm/i915: Don't enable WaIncreaseLatencyIPCEnabled when IPC is disabled") |
| 8fdda3854967 ("drm/i915: Introduce .set_idle_link_train() vfunc") |
| fb83f72c48a5 ("drm/i915: Introduce .set_signal_levels() vfunc") |
| eee3f91195ad ("drm/i915: Introduce .set_link_train() vfunc") |
| 8b4f2137cc0f ("drm/i915/display/ddi: Prefer drm_WARN* over WARN*") |
