| 75f664903d86 ("drm/i915/display: Ensure PSR gets disabled if no encoders in new state") |
| 765972cb8564 ("drm/i915/psr: Disable PSR before modesets turn off all planes") |
| 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if there is active planes") |
| 3a3dd5342f32 ("drm/i915/display: Renaming DRRS functions to intel_drrs_*()") |
| a1b63119ee83 ("drm/i915/display: Move DRRS code its own file") |
| ad26451a7902 ("drm/i915/display: Drop PSR support from HSW and BDW") |
| dc6d6158a6e8 ("drm/i915/display: split out dpt out of intel_display.c") |
| 7711749a6049 ("drm/i915/dg2: Update lane disable power state during PSR") |
| a6a128116e55 ("drm/i915/dg2: Wait for SNPS PHY calibration during display init") |
| a046a0daa3c6 ("drm/i915/dg2: Add vswing programming for SNPS phys") |
| 865b73ea18bb ("drm/i915/dg2: Add MPLLB programming for HDMI") |
| 290810080478 ("drm/i915/dg2: Add MPLLB programming for SNPS PHY") |
| 84030adb9e27 ("drm/i915/display: Disable audio, DRRS and PSR before planes") |
| 1d53ccdc400c ("drm/i915/display/adl_p: Implement Wa_16011168373") |
| 0e20b769c4b3 ("drm/i915/display/psr: Handle SU Y granularity") |
| f15f01a79949 ("drm/i915: s/intel_crtc/crtc/") |
| 7397bd54da67 ("drm/i915: Clean up intel_find_initial_plane_obj() a bit") |
| 234b40282efb ("drm/i915/display: Introduce new intel_psr_pause/resume function") |
| 6d7a793aabf3 ("drm/i915/display: Allow fastsets when DP_SDP_VSC infoframe do not match with PSR enabled") |
| 9b2e49a14838 ("drm/i915/display: Fix fastsets involving PSR") |
