| 8e52f54ca994 ("mtd: spi-nor: xilinx: use new macros in S3AN_INFO()") |
| e255a79162b6 ("mtd: spi-nor: default .n_banks to 1") |
| 9983e6da917d ("mtd: spi-nor: store .n_banks in struct spi_nor_flash_parameter") |
| d0cfd228b34c ("mtd: spi-nor: default page_size to 256 bytes") |
| 0554effe99f6 ("mtd: spi-nor: convert .n_sectors to .size") |
| afbfb8c5fb57 ("mtd: spi-nor: xilinx: remove addr_nbytes from S3AN_INFO()") |
| 74b7ad768353 ("mtd: spi-nor: xilinx: use SPI_NOR_ID() in S3AN_INFO()") |
| d534fd9787d5 ("mtd: spi-nor: spansion: use CLPEF as an alternative to CLSR") |
| 4095f4d9225a ("mtd: spi-nor: Fix divide by zero for spi-nor-generic flashes") |
| df6def86b9dc ("mtd: spi-nor: spansion: Add support for s25hl02gt and s25hs02gt") |
| 91f3c430f622 ("mtd: spi-nor: spansion: Add a new ->ready() hook for multi-chip device") |
| 6c01ae11130c ("mtd: spi-nor: spansion: Rework cypress_nor_get_page_size() for multi-chip device support") |
| 706fd00da031 ("mtd: spi-nor: Extract volatile register offset from SCCR map") |
| e570f7872a34 ("mtd: spi-nor: Allow post_sfdp hook to return errors") |
| 120c94a67b26 ("mtd: spi-nor: spansion: Rename method to cypress_nor_get_page_size") |
| a9180c298d35 ("mtd: spi-nor: spansion: Enable JFFS2 write buffer for S25FS256T") |
| 4199c1719e24 ("mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s25hx SEMPER flash") |
| 9fd0945fe6fa ("mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s28hx SEMPER flash") |
| c87c9b11c53c ("mtd: spi-nor: spansion: Determine current address mode") |
| 4e53ab0c292d ("mtd: spi-nor: Set the 4-Byte Address Mode method based on SFDP data") |
