blob: d8ddf9262a40ea5fe10977e77543fca81e77a792 [file] [log] [blame]
9e9dfd080201 ("drm/i915/dg2: Maintain backward-compatible nested batch behavior")
da942750928a ("drm/i915/dg1: Add initial DG1 workarounds")
c33298cb34f5 ("drm/i915/tgl: Fix stepping WA matching")
a170f4f1b128 ("drm/i915/display: Implement WA 1408330847")
6e43e276b8c9 ("drm/i915: Initial implementation of PSR2 selective fetch")
96c5a15f9f39 ("drm/i915/kbl: Fix revision ID checks")
f52fa57ae70e ("drm/i915/rkl: Add initial workarounds")
05e265841f7e ("drm/i915/dg1: add initial DG-1 definitions")
3d702d06cb3c ("drm/i915/tgl: Implement WAs 18011464164 and 22010931296")
885f182cd6ec ("drm/i915: Move all FBC w/as to .init_clock_gating()")
242613af557f ("drm/i915: Use the gt in HAS_ENGINE")
fdeb6d02686f ("drm/i915: Convert device_info to uncore/de_read")
a5523e2ff074 ("drm/i915: Add PSR2 selective fetch registers")
19167eb064da ("drm/i915: Reorder intel_psr2_config_valid()")
19f1f627b333 ("drm/i915/gt: Move ivb GT workarounds from init_clock_gating to workarounds")
f93ec5fb5637 ("drm/i915/gt: Move hsw GT workarounds from init_clock_gating to workarounds")
64cf40a125ff ("drm/i915/psr: Program default IO buffer Wake and Fast Wake")
2d3879950f8a ("drm/i915: Add psr_safest_params")
24d2fc3d530e ("drm/i915/rkl: Disable PSR2")
84f9cbf33580 ("drm/i915/tgl: Implement WA_16011163337")