| 13afa29ae489 ("KVM: x86/pmu: Provide Intel PMU's pmc_is_enabled() as generic x86 code") |
| c85cdc1cc1ea ("KVM: x86/pmu: Move handling PERF_GLOBAL_CTRL and friends to common x86") |
| 30dab5c0b65e ("KVM: x86/pmu: Reject userspace attempts to set reserved GLOBAL_STATUS bits") |
| 8de18543dfe3 ("KVM: x86/pmu: Move reprogram_counters() to pmu.h") |
| 53550b89220b ("KVM: x86/pmu: Rename global_ovf_ctrl_mask to global_status_mask") |
| 649bccd7fac9 ("KVM: x86/pmu: Rewrite reprogram_counters() to improve performance") |
| 8bca8c5ce40b ("KVM: VMX: Refactor intel_pmu_{g,}set_msr() to align with other helpers") |
| cdd2fbf6360e ("KVM: x86/pmu: Rename pmc_is_enabled() to pmc_is_globally_enabled()") |
| 68fb4757e867 ("KVM: x86/pmu: Defer reprogram_counter() to kvm_pmu_handle_event()") |
| dcbb816a2842 ("KVM: x86/pmu: Clear "reprogram" bit if counter is disabled or disallowed") |
| ea5cbc9ff839 ("KVM: x86/svm/pmu: Rewrite get_gp_pmc_amd() for more counters scalability") |
| 5c6a67f4f265 ("KVM: x86/svm/pmu: Direct access pmu->gp_counter[] to implement amd_*_to_pmc()") |
| cf52de619c67 ("KVM: x86/pmu: Avoid using PEBS perf_events for normal counters") |
| c0245b774203 ("KVM: x86/pmu: Refactor PERF_GLOBAL_CTRL update helper for reuse by PEBS") |
| c23981df6642 ("KVM: x86/pmu: Avoid setting BIT_ULL(-1) to pmu->host_cross_mapped_mask") |
| 7de8e5b6b139 ("KVM: VMX: Use proper type-safe functions for vCPU => LBRs helpers") |
| 4496a6f9b45e ("KVM: nVMX: Attempt to load PERF_GLOBAL_CTRL on nVMX xfer iff it exists") |
| b663f0b5f3d6 ("KVM: VMX: Add helper to check if the guest PMU has PERF_GLOBAL_CTRL") |
| 93255bf92939 ("KVM: VMX: Mark all PERF_GLOBAL_(OVF)_CTRL bits reserved if there's no vPMU") |
| 545feb96c052 ("Revert "KVM: x86: always allow host-initiated writes to PMU MSRs"") |