| 81bb9bc95355 ("drm/amd/display: Add W/A for PHY tests with certain LTTPR") |
| c11099b0d1aa ("drm/amd/display: Add vendor specific LTTPR workarounds for DCN31") |
| 54fe00be270d ("drm/amd/display: Implement fixed DP drive settings") |
| f01ee0195862 ("drm/amd/display: Add DP 2.0 SST DC Support") |
| 3bc8d9214679 ("drm/amd/display: Add DP 2.0 HPO Link Encoder") |
| 83228ebb82e4 ("drm/amd/display: Add DP 2.0 HPO Stream Encoder") |
| 61452908a79e ("drm/amd/display: Add DP 2.0 Audio Package Generator") |
| 234b4fd9176c ("drm/amd/display: refactor riommu invalidation wa") |
| ba18f2350e49 ("drm/amd/display: Assume LTTPR interop for DCN31+") |
| 46ddb8965882 ("drm/amd/display: implement workaround for riommu related hang") |
| 1bc6c29f58a4 ("drm/amd/display: isolate link training setting override to its own function") |
| 30adeee52d1e ("drm/amd/display: Enforce DPCD Address ranges") |
| c5bc8c1bd4c7 ("drm/amd/display: Read LTTPR caps first on bootup") |
| ee9b1992f1fd ("drm/amd/display: Move LTTPR cap read into its own function") |
| 0abda67419f7 ("drm/amd/display: Read LTTPR caps first on hotplug") |
| 8a58e25b8b65 ("drm/amd/display: dp mst detection code refactor") |
| 1be2a90288b4 ("drm/amd/display: Support mappable encoders when transmitting training patterns.") |
| 926d6972efb6 ("drm/amd/display: Add DCN3.1 blocks to the DC Makefile") |
| 2083640f0d5b ("drm/amd/display: Add DCN3.1 Resource") |
| 64b1d0e8d500 ("drm/amd/display: Add DCN3.1 HWSEQ") |
