| a10ca2afb8d3 ("drivers/drm/i915: Honor limits->max_bpp while computing DSC max input bpp") |
| 874aa4a3ff50 ("drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC") |
| 9c8160a34383 ("drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp") |
| b9a7efcd9911 ("drm/i915/dp: Rename helper to get DSC max pipe_bpp") |
| 51dda14868ef ("drm/i915/dp: Avoid left shift of DSC output bpp by 4") |
| 2f4761c6654f ("drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also") |
| 8a969033cee8 ("drm/i915/dp: Add functions to get min/max src input bpc with DSC") |
| e1a211e31625 ("drm/i915/dp: Avoid forcing DSC BPC for MST case") |
| 8d5284765a43 ("drm/i915/dp: Use consistent name for link bpp and compressed bpp") |
| 3a4b4809c8cc ("drm/i915/dp: Move compressed bpp check with 420 format inside the helper") |
| a1476c2a9715 ("drm/i915/dp: Consider output_format while computing dsc bpp") |
| 5011f2915b70 ("drm/i915/dp: Check if DSC supports the given output_format") |
| 52f14682ac4d ("drm/i915: Bpp/timeslot calculation fixes for DP MST DSC") |
| d797f67d1e25 ("drm/i915: Extract VESA DSC bpp alignment to separate function") |
| d51f25eb479a ("drm/i915: Add DSC support to MST path") |
| 7971aacf6e2d ("drm/i915: Extract drm_dp_atomic_find_vcpi_slots cycle to separate function") |
| 9096e36d5ba6 ("drm/i915: Fix intel_dp_mst_compute_link_config") |
| 8853750dbad8 ("drm/i915: Enable SDP split for DP2.0") |
| 95589cec1cbf ("drm/i915/dsc: convert dsc debugfs entry from output_bpp to input_bpc") |
| 6f3562b3bca0 ("Merge drm/drm-next into drm-intel-next") |
