| f5def7722b9c ("coresight: etm4x: Cleanup TRCACATRn register accesses") |
| 6ba7f2bc12e8 ("coresight: etm4x: Cleanup TRCVICTLR register accesses") |
| b5bc16ab04fe ("coresight: etm4x: Cleanup TRCSTALLCTLR register accesses") |
| eeae6dddfd34 ("coresight: etm4x: Cleanup TRCEVENTCTL1R register accesses") |
| 1cf50f649464 ("coresight: etm4x: Cleanup TRCCONFIGR register accesses") |
| 028e5460915a ("coresight: etm4x: Cleanup TRCIDR5 register accesses") |
| ea69dbb893d9 ("coresight: etm4x: Cleanup TRCIDR4 register accesses") |
| f4d1f2142a60 ("coresight: etm4x: Cleanup TRCIDR3 register accesses") |
| cf0c7f18d30e ("coresight: etm4x: Cleanup TRCIDR2 register accesses") |
| e601cc9a3a9b ("coresight: etm4x: Cleanup TRCIDR0 register accesses") |
| aab473867fed ("coresight: etm4x: Don't trace PID for non-root PID namespace") |
| d05bbad0130f ("coresight: no-op refactor to make INSTP0 check more idiomatic") |
| ea75a342aed5 ("coresight: Fix TRCCONFIGR.QE sysfs interface") |
| 88f11864cf1d ("coresight: etm-perf: Support PID tracing for kernel at EL2") |
| 53abf3fe8317 ("coresight: etm-perf: Clarify comment on perf options") |
| f72896063396 ("coresight: etm4x: Handle accesses to TRCSTALLCTLR") |
| e49516e2df5b ("coresight: etm4x: Handle ETM architecture version") |
| 4d1b1fd72908 ("coresight: etm4x: Clean up exception level masks") |
| 1d3eead7e9fb ("coresight: etm4x: Cleanup secure exception level masks") |
| 33d5573a15c2 ("coresight: etm4x: Check for Software Lock") |
