| From fb9a5b0c1c9893db2e0d18544fd49e19d784a87d Mon Sep 17 00:00:00 2001 |
| From: Tom St Denis <tom.stdenis@amd.com> |
| Date: Thu, 13 Oct 2016 12:38:07 -0400 |
| Subject: drm/radeon/si_dpm: Limit clocks on HD86xx part |
| |
| From: Tom St Denis <tom.stdenis@amd.com> |
| |
| commit fb9a5b0c1c9893db2e0d18544fd49e19d784a87d upstream. |
| |
| Limit clocks on a specific HD86xx part to avoid |
| crashes (while awaiting an appropriate PP fix). |
| |
| Signed-off-by: Tom St Denis <tom.stdenis@amd.com> |
| Reviewed-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/gpu/drm/radeon/si_dpm.c | 6 ++++++ |
| 1 file changed, 6 insertions(+) |
| |
| --- a/drivers/gpu/drm/radeon/si_dpm.c |
| +++ b/drivers/gpu/drm/radeon/si_dpm.c |
| @@ -3021,6 +3021,12 @@ static void si_apply_state_adjust_rules( |
| max_sclk = 75000; |
| max_mclk = 80000; |
| } |
| + /* limit clocks on HD8600 series */ |
| + if (rdev->pdev->device == 0x6660 && |
| + rdev->pdev->revision == 0x83) { |
| + max_sclk = 75000; |
| + max_mclk = 80000; |
| + } |
| |
| if (rps->vce_active) { |
| rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; |
