| From 937ff9ded8b6ebe8963ade55bdd77a61ded88075 Mon Sep 17 00:00:00 2001 |
| From: Chen-Yu Tsai <wens@csie.org> |
| Date: Fri, 11 Nov 2016 18:05:57 +0800 |
| Subject: clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks |
| |
| From: Chen-Yu Tsai <wens@csie.org> |
| |
| commit 937ff9ded8b6ebe8963ade55bdd77a61ded88075 upstream. |
| |
| The audio module clocks are supposed to be set according to the sample |
| rate of the audio stream. The audio PLL provides the clock signal for |
| these module clocks, and only it is freely tunable. |
| |
| Set CLK_SET_RATE_PARENT for the audio module clocks so their users can |
| properly tune the clock rate. |
| |
| Fixes: 5690879d93e8 ("clk: sunxi-ng: Add A23 CCU") |
| Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
| Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 6 +++--- |
| 1 file changed, 3 insertions(+), 3 deletions(-) |
| |
| --- a/drivers/clk/sunxi-ng/ccu-sun8i-a23.c |
| +++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23.c |
| @@ -344,10 +344,10 @@ static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_c |
| static const char * const i2s_parents[] = { "pll-audio-8x", "pll-audio-4x", |
| "pll-audio-2x", "pll-audio" }; |
| static SUNXI_CCU_MUX_WITH_GATE(i2s0_clk, "i2s0", i2s_parents, |
| - 0x0b0, 16, 2, BIT(31), 0); |
| + 0x0b0, 16, 2, BIT(31), CLK_SET_RATE_PARENT); |
| |
| static SUNXI_CCU_MUX_WITH_GATE(i2s1_clk, "i2s1", i2s_parents, |
| - 0x0b4, 16, 2, BIT(31), 0); |
| + 0x0b4, 16, 2, BIT(31), CLK_SET_RATE_PARENT); |
| |
| /* TODO: the parent for most of the USB clocks is not known */ |
| static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "osc24M", |
| @@ -415,7 +415,7 @@ static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve |
| 0x13c, 16, 3, BIT(31), CLK_SET_RATE_PARENT); |
| |
| static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio", |
| - 0x140, BIT(31), 0); |
| + 0x140, BIT(31), CLK_SET_RATE_PARENT); |
| static SUNXI_CCU_GATE(avs_clk, "avs", "osc24M", |
| 0x144, BIT(31), 0); |
| |