| From 132fdc379eb143932d209a20fd581e1ce7630960 Mon Sep 17 00:00:00 2001 |
| From: Catalin Marinas <catalin.marinas@arm.com> |
| Date: Thu, 24 Jan 2019 17:28:37 +0000 |
| Subject: arm64: Do not issue IPIs for user executable ptes |
| |
| From: Catalin Marinas <catalin.marinas@arm.com> |
| |
| commit 132fdc379eb143932d209a20fd581e1ce7630960 upstream. |
| |
| Commit 3b8c9f1cdfc5 ("arm64: IPI each CPU after invalidating the I-cache |
| for kernel mappings") was aimed at fixing the I-cache invalidation for |
| kernel mappings. However, it inadvertently caused all cache maintenance |
| for user mappings via set_pte_at() -> __sync_icache_dcache() -> |
| sync_icache_aliases() to call kick_all_cpus_sync(). |
| |
| Reported-by: Shijith Thotton <sthotton@marvell.com> |
| Tested-by: Shijith Thotton <sthotton@marvell.com> |
| Reported-by: Wandun Chen <chenwandun@huawei.com> |
| Fixes: 3b8c9f1cdfc5 ("arm64: IPI each CPU after invalidating the I-cache for kernel mappings") |
| Cc: <stable@vger.kernel.org> # 4.19.x- |
| Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
| Signed-off-by: Will Deacon <will.deacon@arm.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| arch/arm64/mm/flush.c | 6 +++++- |
| 1 file changed, 5 insertions(+), 1 deletion(-) |
| |
| --- a/arch/arm64/mm/flush.c |
| +++ b/arch/arm64/mm/flush.c |
| @@ -33,7 +33,11 @@ void sync_icache_aliases(void *kaddr, un |
| __clean_dcache_area_pou(kaddr, len); |
| __flush_icache_all(); |
| } else { |
| - flush_icache_range(addr, addr + len); |
| + /* |
| + * Don't issue kick_all_cpus_sync() after I-cache invalidation |
| + * for user mappings. |
| + */ |
| + __flush_icache_range(addr, addr + len); |
| } |
| } |
| |
