| From aa8e21c053d72b6639ea5a7f1d3a1d0209534c94 Mon Sep 17 00:00:00 2001 |
| From: Athira Rajeev <atrajeev@linux.vnet.ibm.com> |
| Date: Wed, 25 Nov 2020 02:26:55 -0500 |
| Subject: powerpc/perf: Exclude kernel samples while counting events in user space. |
| |
| From: Athira Rajeev <atrajeev@linux.vnet.ibm.com> |
| |
| commit aa8e21c053d72b6639ea5a7f1d3a1d0209534c94 upstream. |
| |
| Perf event attritube supports exclude_kernel flag to avoid |
| sampling/profiling in supervisor state (kernel). Based on this event |
| attr flag, Monitor Mode Control Register bit is set to freeze on |
| supervisor state. But sometimes (due to hardware limitation), Sampled |
| Instruction Address Register (SIAR) locks on to kernel address even |
| when freeze on supervisor is set. Patch here adds a check to drop |
| those samples. |
| |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> |
| Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> |
| Link: https://lore.kernel.org/r/1606289215-1433-1-git-send-email-atrajeev@linux.vnet.ibm.com |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| arch/powerpc/perf/core-book3s.c | 10 ++++++++++ |
| 1 file changed, 10 insertions(+) |
| |
| --- a/arch/powerpc/perf/core-book3s.c |
| +++ b/arch/powerpc/perf/core-book3s.c |
| @@ -2021,6 +2021,16 @@ static void record_and_restart(struct pe |
| perf_event_update_userpage(event); |
| |
| /* |
| + * Due to hardware limitation, sometimes SIAR could sample a kernel |
| + * address even when freeze on supervisor state (kernel) is set in |
| + * MMCR2. Check attr.exclude_kernel and address to drop the sample in |
| + * these cases. |
| + */ |
| + if (event->attr.exclude_kernel && record) |
| + if (is_kernel_addr(mfspr(SPRN_SIAR))) |
| + record = 0; |
| + |
| + /* |
| * Finally record data if requested. |
| */ |
| if (record) { |
