| From foo@baz Wed May 23 19:41:15 CEST 2018 |
| From: Martin Schwidefsky <schwidefsky@de.ibm.com> |
| Date: Wed, 23 May 2018 18:21:49 +0200 |
| Subject: s390/kernel: use expoline for indirect branches |
| To: stable@vger.kernel.org |
| Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> |
| Message-ID: <1527092512-24300-7-git-send-email-schwidefsky@de.ibm.com> |
| |
| From: Martin Schwidefsky <schwidefsky@de.ibm.com> |
| |
| [ Upstream commit c50c84c3ac4d5db683904bdb3257798b6ef980ae ] |
| |
| The assember code in arch/s390/kernel uses a few more indirect branches |
| which need to be done with execute trampolines for CONFIG_EXPOLINE=y. |
| |
| Cc: stable@vger.kernel.org # 4.16 |
| Fixes: f19fbd5ed6 ("s390: introduce execute-trampolines for branches") |
| Reviewed-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> |
| Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/s390/kernel/base.S | 24 ++++++++++++++---------- |
| arch/s390/kernel/reipl.S | 7 +++++-- |
| arch/s390/kernel/swsusp.S | 9 ++++++--- |
| 3 files changed, 25 insertions(+), 15 deletions(-) |
| |
| --- a/arch/s390/kernel/base.S |
| +++ b/arch/s390/kernel/base.S |
| @@ -8,18 +8,22 @@ |
| |
| #include <linux/linkage.h> |
| #include <asm/asm-offsets.h> |
| +#include <asm/nospec-insn.h> |
| #include <asm/ptrace.h> |
| #include <asm/sigp.h> |
| |
| + GEN_BR_THUNK %r9 |
| + GEN_BR_THUNK %r14 |
| + |
| ENTRY(s390_base_mcck_handler) |
| basr %r13,0 |
| 0: lg %r15,__LC_PANIC_STACK # load panic stack |
| aghi %r15,-STACK_FRAME_OVERHEAD |
| larl %r1,s390_base_mcck_handler_fn |
| - lg %r1,0(%r1) |
| - ltgr %r1,%r1 |
| + lg %r9,0(%r1) |
| + ltgr %r9,%r9 |
| jz 1f |
| - basr %r14,%r1 |
| + BASR_EX %r14,%r9 |
| 1: la %r1,4095 |
| lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1) |
| lpswe __LC_MCK_OLD_PSW |
| @@ -36,10 +40,10 @@ ENTRY(s390_base_ext_handler) |
| basr %r13,0 |
| 0: aghi %r15,-STACK_FRAME_OVERHEAD |
| larl %r1,s390_base_ext_handler_fn |
| - lg %r1,0(%r1) |
| - ltgr %r1,%r1 |
| + lg %r9,0(%r1) |
| + ltgr %r9,%r9 |
| jz 1f |
| - basr %r14,%r1 |
| + BASR_EX %r14,%r9 |
| 1: lmg %r0,%r15,__LC_SAVE_AREA_ASYNC |
| ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit |
| lpswe __LC_EXT_OLD_PSW |
| @@ -56,10 +60,10 @@ ENTRY(s390_base_pgm_handler) |
| basr %r13,0 |
| 0: aghi %r15,-STACK_FRAME_OVERHEAD |
| larl %r1,s390_base_pgm_handler_fn |
| - lg %r1,0(%r1) |
| - ltgr %r1,%r1 |
| + lg %r9,0(%r1) |
| + ltgr %r9,%r9 |
| jz 1f |
| - basr %r14,%r1 |
| + BASR_EX %r14,%r9 |
| lmg %r0,%r15,__LC_SAVE_AREA_SYNC |
| lpswe __LC_PGM_OLD_PSW |
| 1: lpswe disabled_wait_psw-0b(%r13) |
| @@ -116,7 +120,7 @@ ENTRY(diag308_reset) |
| larl %r4,.Lcontinue_psw # Restore PSW flags |
| lpswe 0(%r4) |
| .Lcontinue: |
| - br %r14 |
| + BR_EX %r14 |
| .align 16 |
| .Lrestart_psw: |
| .long 0x00080000,0x80000000 + .Lrestart_part2 |
| --- a/arch/s390/kernel/reipl.S |
| +++ b/arch/s390/kernel/reipl.S |
| @@ -6,8 +6,11 @@ |
| |
| #include <linux/linkage.h> |
| #include <asm/asm-offsets.h> |
| +#include <asm/nospec-insn.h> |
| #include <asm/sigp.h> |
| |
| + GEN_BR_THUNK %r9 |
| + |
| # |
| # Issue "store status" for the current CPU to its prefix page |
| # and call passed function afterwards |
| @@ -66,9 +69,9 @@ ENTRY(store_status) |
| st %r4,0(%r1) |
| st %r5,4(%r1) |
| stg %r2,8(%r1) |
| - lgr %r1,%r2 |
| + lgr %r9,%r2 |
| lgr %r2,%r3 |
| - br %r1 |
| + BR_EX %r9 |
| |
| .section .bss |
| .align 8 |
| --- a/arch/s390/kernel/swsusp.S |
| +++ b/arch/s390/kernel/swsusp.S |
| @@ -12,6 +12,7 @@ |
| #include <asm/ptrace.h> |
| #include <asm/thread_info.h> |
| #include <asm/asm-offsets.h> |
| +#include <asm/nospec-insn.h> |
| #include <asm/sigp.h> |
| |
| /* |
| @@ -23,6 +24,8 @@ |
| * (see below) in the resume process. |
| * This function runs with disabled interrupts. |
| */ |
| + GEN_BR_THUNK %r14 |
| + |
| .section .text |
| ENTRY(swsusp_arch_suspend) |
| stmg %r6,%r15,__SF_GPRS(%r15) |
| @@ -102,7 +105,7 @@ ENTRY(swsusp_arch_suspend) |
| spx 0x318(%r1) |
| lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) |
| lghi %r2,0 |
| - br %r14 |
| + BR_EX %r14 |
| |
| /* |
| * Restore saved memory image to correct place and restore register context. |
| @@ -200,7 +203,7 @@ pgm_check_entry: |
| lghi %r1,0 |
| sam31 |
| sigp %r1,%r0,SIGP_SET_ARCHITECTURE |
| - basr %r14,%r3 |
| + brasl %r14,_sclp_print_early |
| larl %r3,.Ldisabled_wait_31 |
| lpsw 0(%r3) |
| 4: |
| @@ -266,7 +269,7 @@ restore_registers: |
| /* Return 0 */ |
| lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15) |
| lghi %r2,0 |
| - br %r14 |
| + BR_EX %r14 |
| |
| .section .data..nosave,"aw",@progbits |
| .align 8 |
