| From 56d5ac094cde3b2b72eeb29358110b78052e6dc5 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Wed, 24 Feb 2021 09:37:37 +0000 |
| Subject: arm64: Add missing ISB after invalidating TLB in __primary_switch |
| |
| From: Marc Zyngier <maz@kernel.org> |
| |
| [ Upstream commit 9d41053e8dc115c92b8002c3db5f545d7602498b ] |
| |
| Although there has been a bit of back and forth on the subject, it |
| appears that invalidating TLBs requires an ISB instruction when FEAT_ETS |
| is not implemented by the CPU. |
| |
| From the bible: |
| |
| | In an implementation that does not implement FEAT_ETS, a TLB |
| | maintenance instruction executed by a PE, PEx, can complete at any |
| | time after it is issued, but is only guaranteed to be finished for a |
| | PE, PEx, after the execution of DSB by the PEx followed by a Context |
| | synchronization event |
| |
| Add the missing ISB in __primary_switch, just in case. |
| |
| Fixes: 3c5e9f238bc4 ("arm64: head.S: move KASLR processing out of __enable_mmu()") |
| Suggested-by: Will Deacon <will@kernel.org> |
| Signed-off-by: Marc Zyngier <maz@kernel.org> |
| Acked-by: Mark Rutland <mark.rutland@arm.com> |
| Link: https://lore.kernel.org/r/20210224093738.3629662-3-maz@kernel.org |
| Signed-off-by: Will Deacon <will@kernel.org> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm64/kernel/head.S | 1 + |
| 1 file changed, 1 insertion(+) |
| |
| diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S |
| index a0dc987724eda..7ec430e18f95e 100644 |
| --- a/arch/arm64/kernel/head.S |
| +++ b/arch/arm64/kernel/head.S |
| @@ -882,6 +882,7 @@ SYM_FUNC_START_LOCAL(__primary_switch) |
| |
| tlbi vmalle1 // Remove any stale TLB entries |
| dsb nsh |
| + isb |
| |
| msr sctlr_el1, x19 // re-enable the MMU |
| isb |
| -- |
| 2.27.0 |
| |
