| From 391b06ecb63e6eacd054582cb4eb738dfbf5eb77 Mon Sep 17 00:00:00 2001 |
| From: Sascha Hauer <s.hauer@pengutronix.de> |
| Date: Mon, 30 Dec 2024 14:18:58 +0000 |
| Subject: nvmem: imx-ocotp-ele: fix MAC address byte order |
| |
| From: Sascha Hauer <s.hauer@pengutronix.de> |
| |
| commit 391b06ecb63e6eacd054582cb4eb738dfbf5eb77 upstream. |
| |
| According to the i.MX93 Fusemap the two MAC addresses are stored in |
| words 315 to 317 like this: |
| |
| 315 MAC1_ADDR_31_0[31:0] |
| 316 MAC1_ADDR_47_32[47:32] |
| MAC2_ADDR_15_0[15:0] |
| 317 MAC2_ADDR_47_16[31:0] |
| |
| This means the MAC addresses are stored in reverse byte order. We have |
| to swap the bytes before passing them to the upper layers. The storage |
| format is consistent to the one used on i.MX6 using imx-ocotp driver |
| which does the same byte swapping as introduced here. |
| |
| With this patch the MAC address on my i.MX93 TQ board correctly reads as |
| 00:d0:93:6b:27:b8 instead of b8:27:6b:93:d0:00. |
| |
| Fixes: 22e9e6fcfb50 ("nvmem: imx: support i.MX93 OCOTP") |
| Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> |
| Cc: stable <stable@kernel.org> |
| Reviewed-by: Peng Fan <peng.fan@nxp.com> |
| Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
| Link: https://lore.kernel.org/r/20241230141901.263976-4-srinivas.kandagatla@linaro.org |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/nvmem/imx-ocotp-ele.c | 22 ++++++++++++++++++++++ |
| 1 file changed, 22 insertions(+) |
| |
| --- a/drivers/nvmem/imx-ocotp-ele.c |
| +++ b/drivers/nvmem/imx-ocotp-ele.c |
| @@ -109,6 +109,26 @@ static int imx_ocotp_reg_read(void *cont |
| return 0; |
| }; |
| |
| +static int imx_ocotp_cell_pp(void *context, const char *id, int index, |
| + unsigned int offset, void *data, size_t bytes) |
| +{ |
| + u8 *buf = data; |
| + int i; |
| + |
| + /* Deal with some post processing of nvmem cell data */ |
| + if (id && !strcmp(id, "mac-address")) |
| + for (i = 0; i < bytes / 2; i++) |
| + swap(buf[i], buf[bytes - i - 1]); |
| + |
| + return 0; |
| +} |
| + |
| +static void imx_ocotp_fixup_dt_cell_info(struct nvmem_device *nvmem, |
| + struct nvmem_cell_info *cell) |
| +{ |
| + cell->read_post_process = imx_ocotp_cell_pp; |
| +} |
| + |
| static int imx_ele_ocotp_probe(struct platform_device *pdev) |
| { |
| struct device *dev = &pdev->dev; |
| @@ -135,6 +155,8 @@ static int imx_ele_ocotp_probe(struct pl |
| priv->config.stride = 1; |
| priv->config.priv = priv; |
| priv->config.read_only = true; |
| + priv->config.add_legacy_fixed_of_cells = true; |
| + priv->config.fixup_dt_cell_info = imx_ocotp_fixup_dt_cell_info; |
| mutex_init(&priv->lock); |
| |
| nvmem = devm_nvmem_register(dev, &priv->config); |