| From bbb8f4b569d4fc2ab87f40c1a4c82a6529a2faf9 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Thu, 10 Apr 2025 11:00:08 -0400 |
| Subject: drm/amd/display: Update IPS sequential_ono requirement checks |
| |
| From: Ovidiu Bunea <Ovidiu.Bunea@amd.com> |
| |
| [ Upstream commit b4db797117ceba88ba405a080811369418104304 ] |
| |
| [why & how] |
| ASICs that require special RCG/PG programming are determined based |
| on hw_internal_rev. Update these checks to properly include all such |
| ASICs. |
| |
| Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> |
| Signed-off-by: Ovidiu Bunea <Ovidiu.Bunea@amd.com> |
| Signed-off-by: Ray Wu <ray.wu@amd.com> |
| Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c | 2 +- |
| drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c | 2 +- |
| drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c | 2 +- |
| 3 files changed, 3 insertions(+), 3 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c |
| index 62b7012cda430..f7a373a3d70a5 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c |
| +++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c |
| @@ -138,7 +138,7 @@ bool dpp35_construct( |
| dpp->base.funcs = &dcn35_dpp_funcs; |
| |
| // w/a for cursor memory stuck in LS by programming DISPCLK_R_GATE_DISABLE, limit w/a to some ASIC revs |
| - if (dpp->base.ctx->asic_id.hw_internal_rev <= 0x10) |
| + if (dpp->base.ctx->asic_id.hw_internal_rev < 0x40) |
| dpp->dispclk_r_gate_disable = true; |
| return ret; |
| } |
| diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c |
| index ffd2b816cd02c..8948d44a7a80e 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c |
| +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c |
| @@ -1903,7 +1903,7 @@ static bool dcn35_resource_construct( |
| dc->caps.max_disp_clock_khz_at_vmin = 650000; |
| |
| /* Sequential ONO is based on ASIC. */ |
| - if (dc->ctx->asic_id.hw_internal_rev > 0x10) |
| + if (dc->ctx->asic_id.hw_internal_rev >= 0x40) |
| dc->caps.sequential_ono = true; |
| |
| /* Use pipe context based otg sync logic */ |
| diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c |
| index b6468573dc33d..7f19689e976a1 100644 |
| --- a/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c |
| +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c |
| @@ -1876,7 +1876,7 @@ static bool dcn36_resource_construct( |
| dc->caps.max_disp_clock_khz_at_vmin = 650000; |
| |
| /* Sequential ONO is based on ASIC. */ |
| - if (dc->ctx->asic_id.hw_internal_rev > 0x10) |
| + if (dc->ctx->asic_id.hw_internal_rev >= 0x40) |
| dc->caps.sequential_ono = true; |
| |
| /* Use pipe context based otg sync logic */ |
| -- |
| 2.39.5 |
| |
