| From cdd5b2a3b0743a173bbfedc32ea5f1b37caa236a Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 25 Jul 2023 19:11:54 +0530 |
| Subject: drm/amdgpu: Match against exact bootloader status |
| |
| From: Lijo Lazar <lijo.lazar@amd.com> |
| |
| [ Upstream commit d3de41ee5febe5c2d9989fe9810bce2bb54a3a8e ] |
| |
| On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the |
| least significant bits for any command submission. Hence match against |
| the exact register value, otherwise a register value of all 0xFFs also |
| could falsely indicate that boot loader is ready. Also, from PSP v13.0.6 |
| and newer, bits[7:0] will be used to indicate command error status. |
| |
| Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> |
| Acked-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 15 ++++++++------- |
| 1 file changed, 8 insertions(+), 7 deletions(-) |
| |
| diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c |
| index caee76ab71105..92f2ee412908d 100644 |
| --- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c |
| +++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c |
| @@ -136,14 +136,15 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp) |
| int ret; |
| int retry_loop; |
| |
| + /* Wait for bootloader to signify that it is ready having bit 31 of |
| + * C2PMSG_35 set to 1. All other bits are expected to be cleared. |
| + * If there is an error in processing command, bits[7:0] will be set. |
| + * This is applicable for PSP v13.0.6 and newer. |
| + */ |
| for (retry_loop = 0; retry_loop < 10; retry_loop++) { |
| - /* Wait for bootloader to signify that is |
| - ready having bit 31 of C2PMSG_35 set to 1 */ |
| - ret = psp_wait_for(psp, |
| - SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35), |
| - 0x80000000, |
| - 0x80000000, |
| - false); |
| + ret = psp_wait_for( |
| + psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35), |
| + 0x80000000, 0xffffffff, false); |
| |
| if (ret == 0) |
| return 0; |
| -- |
| 2.40.1 |
| |
