| From 89a271d65f0ea70c488f63e14d855791b7c734a9 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Fri, 13 Dec 2024 15:30:17 +0100 |
| Subject: clk: amlogic: g12b: fix cluster A parent data |
| |
| From: Jerome Brunet <jbrunet@baylibre.com> |
| |
| [ Upstream commit 8995f8f108c3ac5ad52b12a6cfbbc7b3b32e9a58 ] |
| |
| Several clocks used by both g12a and g12b use the g12a cpu A clock hw |
| pointer as clock parent. This is incorrect on g12b since the parents of |
| cluster A cpu clock are different. Also the hw clock provided as parent to |
| these children is not even registered clock on g12b. |
| |
| Fix the problem by reverting to the global namespace and let CCF pick |
| the appropriate, as it is already done for other clocks, such as |
| cpu_clk_trace_div. |
| |
| Fixes: 25e682a02d91 ("clk: meson: g12a: migrate to the new parent description method") |
| Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> |
| Link: https://lore.kernel.org/r/20241213-amlogic-clk-g12a-cpua-parent-fix-v1-1-d8c0f41865fe@baylibre.com |
| Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/clk/meson/g12a.c | 36 ++++++++++++++++++++++++------------ |
| 1 file changed, 24 insertions(+), 12 deletions(-) |
| |
| diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c |
| index f373a8d48b1d3..faaf33a82721d 100644 |
| --- a/drivers/clk/meson/g12a.c |
| +++ b/drivers/clk/meson/g12a.c |
| @@ -1138,8 +1138,18 @@ static struct clk_regmap g12a_cpu_clk_div16_en = { |
| .hw.init = &(struct clk_init_data) { |
| .name = "cpu_clk_div16_en", |
| .ops = &clk_regmap_gate_ro_ops, |
| - .parent_hws = (const struct clk_hw *[]) { |
| - &g12a_cpu_clk.hw |
| + .parent_data = &(const struct clk_parent_data) { |
| + /* |
| + * Note: |
| + * G12A and G12B have different cpu clocks (with |
| + * different struct clk_hw). We fallback to the global |
| + * naming string mechanism so this clock picks |
| + * up the appropriate one. Same goes for the other |
| + * clock using cpu cluster A clock output and present |
| + * on both G12 variant. |
| + */ |
| + .name = "cpu_clk", |
| + .index = -1, |
| }, |
| .num_parents = 1, |
| /* |
| @@ -1204,7 +1214,10 @@ static struct clk_regmap g12a_cpu_clk_apb_div = { |
| .hw.init = &(struct clk_init_data){ |
| .name = "cpu_clk_apb_div", |
| .ops = &clk_regmap_divider_ro_ops, |
| - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, |
| + .parent_data = &(const struct clk_parent_data) { |
| + .name = "cpu_clk", |
| + .index = -1, |
| + }, |
| .num_parents = 1, |
| }, |
| }; |
| @@ -1238,7 +1251,10 @@ static struct clk_regmap g12a_cpu_clk_atb_div = { |
| .hw.init = &(struct clk_init_data){ |
| .name = "cpu_clk_atb_div", |
| .ops = &clk_regmap_divider_ro_ops, |
| - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, |
| + .parent_data = &(const struct clk_parent_data) { |
| + .name = "cpu_clk", |
| + .index = -1, |
| + }, |
| .num_parents = 1, |
| }, |
| }; |
| @@ -1272,7 +1288,10 @@ static struct clk_regmap g12a_cpu_clk_axi_div = { |
| .hw.init = &(struct clk_init_data){ |
| .name = "cpu_clk_axi_div", |
| .ops = &clk_regmap_divider_ro_ops, |
| - .parent_hws = (const struct clk_hw *[]) { &g12a_cpu_clk.hw }, |
| + .parent_data = &(const struct clk_parent_data) { |
| + .name = "cpu_clk", |
| + .index = -1, |
| + }, |
| .num_parents = 1, |
| }, |
| }; |
| @@ -1307,13 +1326,6 @@ static struct clk_regmap g12a_cpu_clk_trace_div = { |
| .name = "cpu_clk_trace_div", |
| .ops = &clk_regmap_divider_ro_ops, |
| .parent_data = &(const struct clk_parent_data) { |
| - /* |
| - * Note: |
| - * G12A and G12B have different cpu_clks (with |
| - * different struct clk_hw). We fallback to the global |
| - * naming string mechanism so cpu_clk_trace_div picks |
| - * up the appropriate one. |
| - */ |
| .name = "cpu_clk", |
| .index = -1, |
| }, |
| -- |
| 2.39.5 |
| |