| From adc60298c80efef4c2d7a7860b91b450931a7cf8 Mon Sep 17 00:00:00 2001 |
| From: Aurelien BOUIN <a_bouin@yahoo.fr> |
| Date: Mon, 29 Dec 2014 16:13:51 -0800 |
| Subject: ASoC: fsl_esai: Fix incorrect xDC field width of xCCR registers |
| |
| From: Aurelien BOUIN <a_bouin@yahoo.fr> |
| |
| commit adc60298c80efef4c2d7a7860b91b450931a7cf8 upstream. |
| |
| The xDC field should have 5 bit width according to Reference Manual. |
| Thus this patch fixes it. |
| |
| Signed-off-by: Aurelien BOUIN <a_bouin@yahoo.fr> |
| Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> |
| Signed-off-by: Mark Brown <broonie@kernel.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| sound/soc/fsl/fsl_esai.h | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| --- a/sound/soc/fsl/fsl_esai.h |
| +++ b/sound/soc/fsl/fsl_esai.h |
| @@ -302,7 +302,7 @@ |
| #define ESAI_xCCR_xFP_MASK (((1 << ESAI_xCCR_xFP_WIDTH) - 1) << ESAI_xCCR_xFP_SHIFT) |
| #define ESAI_xCCR_xFP(v) ((((v) - 1) << ESAI_xCCR_xFP_SHIFT) & ESAI_xCCR_xFP_MASK) |
| #define ESAI_xCCR_xDC_SHIFT 9 |
| -#define ESAI_xCCR_xDC_WIDTH 4 |
| +#define ESAI_xCCR_xDC_WIDTH 5 |
| #define ESAI_xCCR_xDC_MASK (((1 << ESAI_xCCR_xDC_WIDTH) - 1) << ESAI_xCCR_xDC_SHIFT) |
| #define ESAI_xCCR_xDC(v) ((((v) - 1) << ESAI_xCCR_xDC_SHIFT) & ESAI_xCCR_xDC_MASK) |
| #define ESAI_xCCR_xPSR_SHIFT 8 |
