| From c4c40e51f9c32c6dd8adf606624c930a1c4d9bbb Mon Sep 17 00:00:00 2001 |
| From: Benjamin Poirier <bpoirier@suse.com> |
| Date: Fri, 21 Jul 2017 11:36:23 -0700 |
| Subject: e1000e: Fix error path in link detection |
| |
| From: Benjamin Poirier <bpoirier@suse.com> |
| |
| commit c4c40e51f9c32c6dd8adf606624c930a1c4d9bbb upstream. |
| |
| In case of error from e1e_rphy(), the loop will exit early and "success" |
| will be set to true erroneously. |
| |
| Signed-off-by: Benjamin Poirier <bpoirier@suse.com> |
| Tested-by: Aaron Brown <aaron.f.brown@intel.com> |
| Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
| Signed-off-by: Amit Pundir <amit.pundir@linaro.org> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/net/ethernet/intel/e1000e/phy.c | 7 ++++--- |
| 1 file changed, 4 insertions(+), 3 deletions(-) |
| |
| --- a/drivers/net/ethernet/intel/e1000e/phy.c |
| +++ b/drivers/net/ethernet/intel/e1000e/phy.c |
| @@ -1744,6 +1744,7 @@ s32 e1000e_phy_has_link_generic(struct e |
| s32 ret_val = 0; |
| u16 i, phy_status; |
| |
| + *success = false; |
| for (i = 0; i < iterations; i++) { |
| /* Some PHYs require the MII_BMSR register to be read |
| * twice due to the link bit being sticky. No harm doing |
| @@ -1763,16 +1764,16 @@ s32 e1000e_phy_has_link_generic(struct e |
| ret_val = e1e_rphy(hw, MII_BMSR, &phy_status); |
| if (ret_val) |
| break; |
| - if (phy_status & BMSR_LSTATUS) |
| + if (phy_status & BMSR_LSTATUS) { |
| + *success = true; |
| break; |
| + } |
| if (usec_interval >= 1000) |
| msleep(usec_interval / 1000); |
| else |
| udelay(usec_interval); |
| } |
| |
| - *success = (i < iterations); |
| - |
| return ret_val; |
| } |
| |
