| From 1e55d4f3d21054d791c51a3426cd5c0b4665acd3 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Fri, 11 Feb 2022 18:25:23 -0500 |
| Subject: Revert "net: axienet: Wait for PhyRstCmplt after core reset" |
| |
| This reverts commit ff594e1b6f39f07f050759de2d27c36b7739c0c9. |
| |
| Breaks the build on 4.14 and 4.9. |
| |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 ---------- |
| 1 file changed, 10 deletions(-) |
| |
| diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c |
| index d2ba466613c0a..7876e56a5b5db 100644 |
| --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c |
| +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c |
| @@ -279,16 +279,6 @@ static int axienet_dma_bd_init(struct net_device *ndev) |
| axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, |
| cr | XAXIDMA_CR_RUNSTOP_MASK); |
| |
| - /* Wait for PhyRstCmplt bit to be set, indicating the PHY reset has finished */ |
| - ret = read_poll_timeout(axienet_ior, value, |
| - value & XAE_INT_PHYRSTCMPLT_MASK, |
| - DELAY_OF_ONE_MILLISEC, 50000, false, lp, |
| - XAE_IS_OFFSET); |
| - if (ret) { |
| - dev_err(lp->dev, "%s: timeout waiting for PhyRstCmplt\n", __func__); |
| - return ret; |
| - } |
| - |
| return 0; |
| out: |
| axienet_dma_bd_release(ndev); |
| -- |
| 2.34.1 |
| |
