| From foo@baz Wed Dec 6 18:04:41 CET 2017 |
| From: Aaron Sierra <asierra@xes-inc.com> |
| Date: Wed, 4 Oct 2017 10:01:28 -0500 |
| Subject: serial: 8250: Preserve DLD[7:4] for PORT_XR17V35X |
| |
| From: Aaron Sierra <asierra@xes-inc.com> |
| |
| |
| [ Upstream commit 0ab84da2e076948c49d36197ee7d254125c53eab ] |
| |
| The upper four bits of the XR17V35x fractional divisor register (DLD) |
| control general chip function (RS-485 direction pin polarity, multidrop |
| mode, XON/XOFF parity check, and fast IR mode). Don't allow these bits |
| to be clobbered when setting the baudrate. |
| |
| Signed-off-by: Aaron Sierra <asierra@xes-inc.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| Signed-off-by: Sasha Levin <alexander.levin@verizon.com> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/tty/serial/8250/8250_port.c | 5 ++++- |
| 1 file changed, 4 insertions(+), 1 deletion(-) |
| |
| --- a/drivers/tty/serial/8250/8250_port.c |
| +++ b/drivers/tty/serial/8250/8250_port.c |
| @@ -2586,8 +2586,11 @@ static void serial8250_set_divisor(struc |
| serial_dl_write(up, quot); |
| |
| /* XR17V35x UARTs have an extra fractional divisor register (DLD) */ |
| - if (up->port.type == PORT_XR17V35X) |
| + if (up->port.type == PORT_XR17V35X) { |
| + /* Preserve bits not related to baudrate; DLD[7:4]. */ |
| + quot_frac |= serial_port_in(port, 0x2) & 0xf0; |
| serial_port_out(port, 0x2, quot_frac); |
| + } |
| } |
| |
| static unsigned int serial8250_get_baud_rate(struct uart_port *port, |