| From 51f0dae5c989f0a025c78e98c51bf52ea280fa40 Mon Sep 17 00:00:00 2001 |
| From: Sasha Levin <sashal@kernel.org> |
| Date: Tue, 6 Nov 2018 01:23:39 -0500 |
| Subject: Revert "ARM: tegra: Fix ULPI regression on Tegra20" |
| |
| This reverts commit b39ac54215190bc178ae7de799e74d327a3c1a33. |
| |
| The issue was fixed by upstream commit 5d797111afe1 ("clk: |
| tegra: Add quirk for getting CDEV1/2 clocks on Tegra20"). |
| |
| Signed-off-by: Sasha Levin <sashal@kernel.org> |
| --- |
| arch/arm/boot/dts/tegra20.dtsi | 2 +- |
| 1 file changed, 1 insertion(+), 1 deletion(-) |
| |
| diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi |
| index 2780e68a853b..914f59166a99 100644 |
| --- a/arch/arm/boot/dts/tegra20.dtsi |
| +++ b/arch/arm/boot/dts/tegra20.dtsi |
| @@ -706,7 +706,7 @@ |
| phy_type = "ulpi"; |
| clocks = <&tegra_car TEGRA20_CLK_USB2>, |
| <&tegra_car TEGRA20_CLK_PLL_U>, |
| - <&tegra_car TEGRA20_CLK_PLL_P_OUT4>; |
| + <&tegra_car TEGRA20_CLK_CDEV2>; |
| clock-names = "reg", "pll_u", "ulpi-link"; |
| resets = <&tegra_car 58>, <&tegra_car 22>; |
| reset-names = "usb", "utmi-pads"; |
| -- |
| 2.17.1 |
| |
