| From 5eb9a07a4ae1008b67d8bcd47bddb3dae97456b7 Mon Sep 17 00:00:00 2001 |
| From: Kamal Dasu <kdasu.kdev@gmail.com> |
| Date: Thu, 26 Apr 2018 14:48:00 -0400 |
| Subject: spi: bcm-qspi: Avoid setting MSPI_CDRAM_PCS for spi-nor master |
| |
| From: Kamal Dasu <kdasu.kdev@gmail.com> |
| |
| commit 5eb9a07a4ae1008b67d8bcd47bddb3dae97456b7 upstream. |
| |
| Added fix for probing of spi-nor device non-zero chip selects. Set |
| MSPI_CDRAM_PCS (peripheral chip select) with spi master for MSPI |
| controller and not for MSPI/BSPI spi-nor master controller. Ensure |
| setting of cs bit in chip select register on chip select change. |
| |
| Fixes: fa236a7ef24048 ("spi: bcm-qspi: Add Broadcom MSPI driver") |
| Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> |
| Signed-off-by: Mark Brown <broonie@kernel.org> |
| Cc: stable@vger.kernel.org |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| |
| --- |
| drivers/spi/spi-bcm-qspi.c | 24 ++++++++++++++++-------- |
| 1 file changed, 16 insertions(+), 8 deletions(-) |
| |
| --- a/drivers/spi/spi-bcm-qspi.c |
| +++ b/drivers/spi/spi-bcm-qspi.c |
| @@ -543,16 +543,19 @@ static void bcm_qspi_disable_bspi(struct |
| |
| static void bcm_qspi_chip_select(struct bcm_qspi *qspi, int cs) |
| { |
| - u32 data = 0; |
| + u32 rd = 0; |
| + u32 wr = 0; |
| |
| - if (qspi->curr_cs == cs) |
| - return; |
| if (qspi->base[CHIP_SELECT]) { |
| - data = bcm_qspi_read(qspi, CHIP_SELECT, 0); |
| - data = (data & ~0xff) | (1 << cs); |
| - bcm_qspi_write(qspi, CHIP_SELECT, 0, data); |
| + rd = bcm_qspi_read(qspi, CHIP_SELECT, 0); |
| + wr = (rd & ~0xff) | (1 << cs); |
| + if (rd == wr) |
| + return; |
| + bcm_qspi_write(qspi, CHIP_SELECT, 0, wr); |
| usleep_range(10, 20); |
| } |
| + |
| + dev_dbg(&qspi->pdev->dev, "using cs:%d\n", cs); |
| qspi->curr_cs = cs; |
| } |
| |
| @@ -770,8 +773,13 @@ static int write_to_hw(struct bcm_qspi * |
| dev_dbg(&qspi->pdev->dev, "WR %04x\n", val); |
| } |
| mspi_cdram = MSPI_CDRAM_CONT_BIT; |
| - mspi_cdram |= (~(1 << spi->chip_select) & |
| - MSPI_CDRAM_PCS); |
| + |
| + if (has_bspi(qspi)) |
| + mspi_cdram &= ~1; |
| + else |
| + mspi_cdram |= (~(1 << spi->chip_select) & |
| + MSPI_CDRAM_PCS); |
| + |
| mspi_cdram |= ((tp.trans->bits_per_word <= 8) ? 0 : |
| MSPI_CDRAM_BITSE_BIT); |
| |