| From foo@baz Mon May 21 22:23:33 CEST 2018 |
| From: Thomas Gleixner <tglx@linutronix.de> |
| Date: Thu, 10 May 2018 16:26:00 +0200 |
| Subject: x86/cpufeatures: Add FEATURE_ZEN |
| |
| From: Thomas Gleixner <tglx@linutronix.de> |
| |
| commit d1035d971829dcf80e8686ccde26f94b0a069472 upstream |
| |
| Add a ZEN feature bit so family-dependent static_cpu_has() optimizations |
| can be built for ZEN. |
| |
| Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
| Reviewed-by: Borislav Petkov <bp@suse.de> |
| Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> |
| Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| arch/x86/include/asm/cpufeatures.h | 2 ++ |
| arch/x86/kernel/cpu/amd.c | 1 + |
| 2 files changed, 3 insertions(+) |
| |
| --- a/arch/x86/include/asm/cpufeatures.h |
| +++ b/arch/x86/include/asm/cpufeatures.h |
| @@ -212,6 +212,8 @@ |
| #define X86_FEATURE_IBRS ( 7*32+25) /* Indirect Branch Restricted Speculation */ |
| #define X86_FEATURE_IBPB ( 7*32+26) /* Indirect Branch Prediction Barrier */ |
| #define X86_FEATURE_STIBP ( 7*32+27) /* Single Thread Indirect Branch Predictors */ |
| +#define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */ |
| + |
| |
| /* Virtualization flags: Linux defined, word 8 */ |
| #define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */ |
| --- a/arch/x86/kernel/cpu/amd.c |
| +++ b/arch/x86/kernel/cpu/amd.c |
| @@ -751,6 +751,7 @@ static void init_amd_bd(struct cpuinfo_x |
| |
| static void init_amd_zn(struct cpuinfo_x86 *c) |
| { |
| + set_cpu_cap(c, X86_FEATURE_ZEN); |
| /* |
| * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects |
| * all up to and including B1. |