| From foo@baz Sat 18 Apr 2020 11:09:57 AM CEST |
| From: DENG Qingfang <dqfext@gmail.com> |
| Date: Tue, 14 Apr 2020 14:34:08 +0800 |
| Subject: net: dsa: mt7530: fix tagged frames pass-through in VLAN-unaware mode |
| |
| From: DENG Qingfang <dqfext@gmail.com> |
| |
| [ Upstream commit e045124e93995fe01e42ed530003ddba5d55db4f ] |
| |
| In VLAN-unaware mode, the Egress Tag (EG_TAG) field in Port VLAN |
| Control register must be set to Consistent to let tagged frames pass |
| through as is, otherwise their tags will be stripped. |
| |
| Fixes: 83163f7dca56 ("net: dsa: mediatek: add VLAN support for MT7530") |
| Signed-off-by: DENG Qingfang <dqfext@gmail.com> |
| Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> |
| Tested-by: René van Dorst <opensource@vdorst.com> |
| Signed-off-by: David S. Miller <davem@davemloft.net> |
| Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| --- |
| drivers/net/dsa/mt7530.c | 18 ++++++++++++------ |
| drivers/net/dsa/mt7530.h | 7 +++++++ |
| 2 files changed, 19 insertions(+), 6 deletions(-) |
| |
| --- a/drivers/net/dsa/mt7530.c |
| +++ b/drivers/net/dsa/mt7530.c |
| @@ -857,8 +857,9 @@ mt7530_port_set_vlan_unaware(struct dsa_ |
| */ |
| mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK, |
| MT7530_PORT_MATRIX_MODE); |
| - mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK, |
| - VLAN_ATTR(MT7530_VLAN_TRANSPARENT)); |
| + mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK, |
| + VLAN_ATTR(MT7530_VLAN_TRANSPARENT) | |
| + PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); |
| |
| for (i = 0; i < MT7530_NUM_PORTS; i++) { |
| if (dsa_is_user_port(ds, i) && |
| @@ -874,8 +875,8 @@ mt7530_port_set_vlan_unaware(struct dsa_ |
| if (all_user_ports_removed) { |
| mt7530_write(priv, MT7530_PCR_P(MT7530_CPU_PORT), |
| PCR_MATRIX(dsa_user_ports(priv->ds))); |
| - mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT), |
| - PORT_SPEC_TAG); |
| + mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT), PORT_SPEC_TAG |
| + | PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); |
| } |
| } |
| |
| @@ -901,8 +902,9 @@ mt7530_port_set_vlan_aware(struct dsa_sw |
| /* Set the port as a user port which is to be able to recognize VID |
| * from incoming packets before fetching entry within the VLAN table. |
| */ |
| - mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK, |
| - VLAN_ATTR(MT7530_VLAN_USER)); |
| + mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK | PVC_EG_TAG_MASK, |
| + VLAN_ATTR(MT7530_VLAN_USER) | |
| + PVC_EG_TAG(MT7530_VLAN_EG_DISABLED)); |
| } |
| |
| static void |
| @@ -1332,6 +1334,10 @@ mt7530_setup(struct dsa_switch *ds) |
| mt7530_cpu_port_enable(priv, i); |
| else |
| mt7530_port_disable(ds, i); |
| + |
| + /* Enable consistent egress tag */ |
| + mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK, |
| + PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); |
| } |
| |
| /* Setup port 5 */ |
| --- a/drivers/net/dsa/mt7530.h |
| +++ b/drivers/net/dsa/mt7530.h |
| @@ -167,9 +167,16 @@ enum mt7530_port_mode { |
| /* Register for port vlan control */ |
| #define MT7530_PVC_P(x) (0x2010 + ((x) * 0x100)) |
| #define PORT_SPEC_TAG BIT(5) |
| +#define PVC_EG_TAG(x) (((x) & 0x7) << 8) |
| +#define PVC_EG_TAG_MASK PVC_EG_TAG(7) |
| #define VLAN_ATTR(x) (((x) & 0x3) << 6) |
| #define VLAN_ATTR_MASK VLAN_ATTR(3) |
| |
| +enum mt7530_vlan_port_eg_tag { |
| + MT7530_VLAN_EG_DISABLED = 0, |
| + MT7530_VLAN_EG_CONSISTENT = 1, |
| +}; |
| + |
| enum mt7530_vlan_port_attr { |
| MT7530_VLAN_USER = 0, |
| MT7530_VLAN_TRANSPARENT = 3, |